Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2003-09-23
2004-09-07
Dinh, Son T (Department: 2824)
Static information storage and retrieval
Floating gate
Particular connection
C365S189050
Reexamination Certificate
active
06788575
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a nonvolatile memory which permits electrical writing and erasion of information to be stored, and to a technique that can be effectively applied to a flash memory provided with a replacing function to any defective area in memory array and having an area in which to store a management information table for managing defective addresses.
A flash memory uses as its memory cells nonvolatile memory elements each consisting of a double gate-structured MOSFET having a control gate and a floating gate, and is caused to store information by varying the accumulated charge of the floating gate and thereby varying the threshold voltage of the MOSFET.
In a flash memory, the threshold voltage is varied when data are to be written into memory cells or data therein are to be erased, the currently available manufacturing techniques cannot avoid uneven variations of the threshold voltage due to uneven characteristics of memory cells even if writing or erasion is done under the same conditions, and sometimes there arise a detective memory cell or cells which do not allow sufficient threshold voltage variation.
A conventional flash memory is often provided with a replacing function to replace a prescribed memory area, when there arises any defective memory cell not allowing the threshold voltage to vary sufficiently, involving that defective memory cell with another normal memory area and another area in which to store management table information for managing defective addresses.
SUMMARY OF THE INVENTION
However, a conventional flash memory is usually designed to undergo rewriting of management table information for managing defective addresses and other such functions by an external controller. Moreover, since the reliability of data in a flash memory is less than that of data in a mask ROM or RAM because of threshold voltage fluctuations in memory cells and their aging, in configuring a system using any flash memory the reliability of data is increased by equipping the external controller with an error checking and correcting function known as ECC. For this reason, a conventional flash memory imposes a greater load on the system developer when a new system using any flash memory is to be developed.
A conventional flash memory involves another problem that, where a storage area containing any defective memory cell is used as a system area for storing important data for the system, such as table data for managing file positions on the memory, format information and address translation information, it may become impossible to recognize the memory or for the system to operate normally.
An object of the present invention is to make it possible to reduce the load on the system developer by using a nonvolatile memory which permits electrical writing and erasion of information to be stored, such as a flash memory.
Another object of the invention is to make it possible, in a nonvolatile memory which permits electrical writing and erasion of information to be stored, such as a flash memory, to prevent the system using it from running into an abnormal state in which the system becomes unable, and enable the system to operate even if important data for the system, such as management and address translation information, are damaged.
The above-stated and other objects and novel features of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.
Typical aspects of the invention disclosed in this application will be briefly described below.
Thus, according to a first aspect of the invention, a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, is provided with a replacing function to replace a group of memory cells including defective memory cells which are incapable of normal writing or erasion with a group of memory cells including no defective memory cell; a numbers of rewrites averaging function to grasp the number of data rewrites in each group of memory cells and to so perform replacement of memory cell groups that there may arise no substantial difference in the number of rewrites among a plurality of memory cell groups; and an error correcting function to detect and correct any error in data stored in the memory array, wherein first address translation information deriving from the replacing function and second address translation information deriving from the numbers of rewrites averaging function are stored in respectively prescribed areas in the memory array, and the first address translation information and second address translation information concerning the same memory cell group are stored in a plurality of sets in a time series.
As the nonvolatile memory described above has a replacing function and an error correcting function, there is no need to cause an external controller to process replacement or error correction, it is made possible to reduce the load on the system developer and, since a plurality of sets of address translation information are stored, it is further made possible to avoid, even if any set of address translation information is lost, an abnormal state in which the system becomes unable to operate by having another set of such information substituted for the lost information.
Preferably, the memory array should be provided with two or more areas which do not affect each other even if power supply is interrupted during the process of writing into or erasing data in any of the memory cell groups, and the plural sets of first address translation information and second address translation information be stored successively in the two or more second areas. This makes it possible to prevent, even if data in any area in which address translation information is to be stored are lost as a result of writing or erasion, such information stored in other areas from being lost, and to avoid without fail an abnormal state in which the system becomes unable to operate.
REFERENCES:
patent: 5469390 (1995-11-01), Sasaki et al.
patent: 5754567 (1998-05-01), Norman
patent: 6373748 (2002-04-01), Ikehashi et al.
patent: 6678788 (2004-01-01), O'Connell
Iguchi Shinya
Ishii Tatsuya
Kozakai Kenji
Maruyama Jun-ichi
Nakamura Takeshi
Dinh Son T
Miles & Stockbridge P.C.
Renesas Technology Corp.
LandOfFree
Nonvolatile memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Nonvolatile memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Nonvolatile memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3231739