Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2000-02-23
2004-04-06
Fahmy, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S666000, C257S667000, C257S777000
Reexamination Certificate
active
06717244
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a semiconductor device, and more particularly, to a semiconductor device having a structure in which a plurality of semiconductor chips are bonded to a surface of a solid (for example, a semiconductor chip or a wiring board) and a method of assembling the same.
2. Description of Related Art
In order to increase a substantial integration degree of a semiconductor device, a semiconductor device having a chip-on-chip structure in which semiconductor chips in two layers are overlapped with each other has been paid attention to.
Specifically, a pad opening where internal wiring is partially exposed is provided on a device formation surface of each of semiconductor chips to be overlapped, for example. A projection electrode called a “bump” is provided in the pad opening. The semiconductor chips are overlapped with each other by so-called face-to-face bonding.
For example, one of the semiconductor chips is larger than the other semiconductor chip, and is taken as a mother chip or primary chip having an electrode for external connection. That is, an electrode is provided on a device formation surface of the primary chip, for example. The electrode is electrically connected to an electrode on an underlying substrate (a wiring board), and an external connecting electrode is provided on the underlying substrate. When the semiconductor device is mounted, the external connecting electrode on the underlying substrate is soldered to a printed board or a ceramic board.
There may, in some cases, be a plurality of semiconductor chips (daughter chip or secondary chips) to be overlapped with the primary chip. In this case, the secondary chips must be accurately aligned with and joined to the primary chip. The secondary chips are generally mounted on the primary chip one at a time. Accordingly, a mounting operation is repeatedly performed, and the number of times the operation is performed corresponds to the number of secondary chips. Therefore, a long time period is required for assembling. Since there are a plurality of secondary chips, the probability that the secondary chips are erroneously bonded or mounted (an erroneous mounting rate) is considerably high.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide, in a semiconductor device having a structure in which a plurality of semiconductor chips are joined to a surface of a solid, a semiconductor device having a structure in which the production efficiency thereof can be improved.
A second object of the present invention is to provide, in a semiconductor device having a structure in which a plurality of semiconductor chips are joined to a surface of a solid, a semiconductor device having a structure in which the semiconductor chips can be prevented from being erroneously mounted.
A third object of the present invention is to provide a method of assembling a semiconductor device, in which a plurality of semiconductor chips can be efficiently joined to a surface of a solid and therefore, the productivity thereof can be improved.
A fourth object of the present invention is to provide a method of assembling a semiconductor device, in which a plurality of semiconductor chips can be accurately mounted on a surface of a solid, and the semiconductor chips can be prevented from being erroneously mounted.
A semiconductor device according to the present invention comprises a solid; a plurality of semiconductor chips respectively joined to predetermined positions of a surface of the solid; and a frame holding the plurality of semiconductor chips in a relative positional relationship corresponding to joint positions on the surface of the solid.
The solid may be another semiconductor chip or a wiring board.
The plurality of semiconductor chips may be bonded to a surface, opposite to the surface of the solid, of the frame.
The plurality of semiconductor chips may be respectively fitted in through holes formed in the frame.
The plurality of semiconductor chips and the frame may be together sealed with resin.
The frame may be also used as a lead frame. In this case, the solid and the frame may be electrically connected to each other by suitable means such as wire bonding.
According to the present invention, the plurality of semiconductor chips which are overlapped with and joined to the surface of the solid can be arranged in predetermined positions of the frame and can be overlapped with one another utilizing the frame. Consequently, the plurality of semiconductor chips can be overlapped with and joined to the surface of the solid by one mounting operation. If the plurality of semiconductor chips are arranged on the frame without error, erroneous mounting in the step of overlapping the frame with the surface of the solid is not a problem. Consequently, it is possible to realize a semiconductor device which is superior in production efficiency and in which semiconductor chips are hardly erroneously mounted.
A method of assembling a semiconductor device according to the present invention comprises the steps of holding a plurality of semiconductor chips in a frame in a relative positional relationship corresponding to joint positions on a surface of a solid; aligning and overlapping the frame with the surface of the solid; and joining the plurality of semiconductor chips held in the frame to the surface of the solid.
The frame may be removed from the plurality of semiconductor chips after the plurality of semiconductor chips are joined to the surface of the solid.
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Hikita Junichi
Yamamoto Koji
Fahmy Wael
Ha Nathan W.
Rabin & Berdo P.C.
Rohm & Co., Ltd.
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