Run length limited coding with minimal error propagation

Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes

Reexamination Certificate

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Details

C341S051000, C341S060000, C341S061000, C341S068000

Reexamination Certificate

active

06674375

ABSTRACT:

FIELD OF THE INVENTION
This application relates generally to encoding and decoding data, and more particularly to encoding and decoding data in a manner that reduces error propagation in the decoding process and that provides enhanced timing recovery features.
BACKGROUND OF THE INVENTION
In the field of digital communications, digital information is conveyed from a transmitter to a receiver through a channel. “Channel” is a generalized term that can include many things. For instance, in satellite communication systems, the channel consists of the atmosphere between an earth-bound transmitter and a satellite. In data storage devices, such as magnetic disc drives, the channel includes a storage medium where the signal is stored for some period of time before being delivered to the receiver.
To increase data density in or through the channel, and to detect and sometimes to correct errors caused by channel noise, the digital information may be subjected to various coding techniques. These coding techniques convert data words formed of “m” data bits into larger code words formed of “n” code bits. The ratio of the number of data bits to the number of code bits, m
, is known as the code rate of the code.
In one type of coding, known as Non-Return-to-Zero Inverse (NRZI), every digital one in a code word represents a transition in the received signal, and every digital zero represents a lack of transitions in the received signal. To allow the receiver to generate a clock signal from the received signal, the encoded signal is generally limited so that the number of consecutive zeros is no greater than a maximum number “k”. This kind of code is known as a run-length-limited (RLL) code with a “k” constraint.
To minimize the time and energy needed to send the coded data, the code rate should be maximized. To achieve higher code rates, the number of bits being encoded can be increased. For example, a 64/65 code has a higher code rate than a 17/18 code. As the code rate is increased, the complexity of the RLL code and its error propagation increases.
One technique that may be used to correct propagation of errors is to increase the complexity of the error correction circuitry used after the RLL decoder. Unfortunately, high complexity correction circuitry can greatly add to the cost of encoding/decoding systems. However, this technique does not address the issue of RLL code complexity.
Accordingly there is a need for systems and methods for encoding and decoding data in a manner that provides high code rates, sufficient signal transitions for timing recovery purposes, while minimizing the effects or likelihood of propagation errors in the decoding process. At the same time code rate should be maintained at the highest possible value of n/(n+1) where n is the length of the data word.
SUMMARY OF THE INVENTION
Against this backdrop the present invention has been developed. In general, the various encoding systems and methods described herein parse an n-bit data word into a predetermined number of data blocks, individually encoding or forming each data block into a code block that includes at least two binary ones, and then combining each of the code blocks to form a resulting (n+1)-bit code word. The resulting (n+1)-bit code word may then be decoded using the various reciprocal decoding systems and methods described herein.


REFERENCES:
patent: 4644545 (1987-02-01), Gershenson
patent: 5220568 (1993-06-01), Howe et al.
patent: 5537112 (1996-07-01), Tsang
patent: 5781133 (1998-07-01), Tsang
patent: 6198582 (2001-03-01), Tsang et al.
patent: 6504493 (2003-01-01), Burd
patent: 6509849 (2003-01-01), von Wendorff

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