Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Magnetic field
Reexamination Certificate
2001-11-01
2004-05-11
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Magnetic field
C257S200000, C257S414000, C257S421000, C438S097000, C438S719000, C438S733000, C335S002000, C335S079000
Reexamination Certificate
active
06734513
ABSTRACT:
BACKGROUND OF INVENTION
1. Field of the Invention
The present invention relates to a semiconductor element formed on the top surface of a base wafer. In particular, the invention relates to a semiconductor device that is hermetically sealed by bonding a cap wafer to the top surface of a base wafer so that the cap wafer and the base wafer are integrated with each other.
A semiconductor device is known in which a semiconductor element is sealed in hermetically by bonding a cap wafer to the top surface of a base wafer on which the semiconductor element and interconnections are formed with an annular glass frit interposed in between so that the cap wafer and the base wafer are integrated with each other. On the other hand, where the semiconductor element is a microrelay, for example, the resistivity of the interconnections needs to be kept low in a stable manner. To this end, it is desired that the interconnections be made of a hard-to-oxidize noble metal such as gold or platinum.
However, where the interconnections are made of a noble metal such as gold or platinum, the bonding strength is low in regions where lead lines of the interconnections cross the glass frit. That is, there exists a problem that it is difficult to hermetically seal in the semiconductor element.
SUMMARY OF INVENTION
An object of the present invention is to provide a semiconductor hermetic sealing structure capable of hermetically sealing in a semiconductor element formed on a base wafer by bonding a cap wafer to the base wafer with a glass frit interposed in between even in the case where interconnections made of a hard-to-oxidize material such as gold are formed on the base wafer.
To attain the above object, the invention provides a semiconductor device comprising a base wafer; a semiconductor element and interconnections formed on a top surface of the base wafer, the interconnections having respective lead lines; a glass frit; a cap wafer bonded to the top surface of the base wafer with the glass frit interposed in between so that the cap wafer and the base wafer are integrated with each other and the semiconductor element is sealed in hermetically; single or multi-layer intermediate layers formed on at least top surfaces of portions of the respective lead lines on which the glass frit is placed, the intermediate layers having a property of easily adhering to the glass frit and the lead lines.
In this semiconductor device, the glass frit strongly adheres to the lead lines of the respective interconnections with the intermediate layer interposed in between. This makes it possible to hermetically seal in the semiconductor element using the cap wafer.
Each of the lead lines may have a cross-section having a gentle top outline with no edge. With this configuration, each intermediate layer can entirely cover the associated lead line even if the intermediate layers are thinner than the lead lines.
The intermediate layers may be thicker or wider than the lead lines. With this configuration, since the lead lines are not exposed in the regions where the intermediate layers are formed, the hermetic sealing becomes even closer to the complete one.
The intermediate layers may be formed on only top surfaces of the respective lead lines. With this configuration, where the interconnections are thin, desired hermetic sealing can be attained by the intermediate layers formed by using a minimum amount of material.
The intermediate layers may be made of one of silver, copper, palladium, rhodium, nickel, cobalt, ruthenium, tungsten, molybdenum, titanium, and chromium. With this configuration, since the intermediate layers are hard to react with the interconnection material at a heating temperature of the joining process with the glass frit, the wiring resistance can be made stable.
At least a portion of each of the intermediate layers that is in contact with the glass frit may be made of an insulating material including one of silicon oxide, aluminum oxide, silicon nitride, and aluminum nitride. With this configuration, the insulating film intermediate layers further increase the bonding strength.
The intermediate layers may be ones that have been subjected to oxidation. This configuration further increases the bonding strength.
The semiconductor element may be a movable element of a microrelay. This configuration provides a microrelay that is less prone to external influences.
Contacts of the microrelay may be made of the same material as the interconnections. This configuration provides a microrelay that can be manufactured by a smaller number of manufacturing steps because the contacts and the interconnections can be produced in the same step.
The invention also provides a manufacturing method of a semiconductor device in which a semiconductor element is sealed in hermetically by bonding a cap wafer to a top surface of a base wafer on which the semiconductor element and interconnections are formed with a glass frit interposed in between so that the cap wafer and the base wafer are integrated with each other, comprising the step of forming single or multi-layer intermediate layers on at least top surfaces of portions of lead lines of the respective interconnections on which the glass frit is to be placed, the intermediate layers having a property of easily adhering to the glass frit and the lead lines.
The invention also provides a microrelay comprising a base wafer; a movable element of the microrelay and interconnections formed on a top surface of the base wafer, the interconnections having respective lead lines; a glass frit; a cap wafer bonded to the top surface of the base wafer with the glass frit interposed in between so that the cap wafer and the base wafer are integrated with each other and the movable element is sealed in hermetically; single or multi-layer intermediate layers formed on at least top surfaces of portions of the respective lead lines on which the glass frit is placed, the intermediate layers having a property of easily adhering to the glass frit and the lead lines.
In this microrelay, the glass frit strongly adheres to the lead lines of the respective interconnections with the intermediate layer interposed in between. This makes it possible to provide a microrelay that is less prone to external influences by virtue of complete hermetic sealing.
The invention further provides a manufacturing method of a microrelay in which a movable element of the microrelay is sealed in hermetically by bonding a cap wafer to a top surface of a base wafer on which the movable element and interconnections are formed with a glass frit interposed in between so that the cap wafer and the base wafer are integrated with each other, comprising the step of forming single or multi-layer intermediate layers on at least top surfaces of portions of lead lines of the respective interconnections on which the glass frit is to be placed, the intermediate layers having a property of easily adhering to the glass frit and the lead lines.
REFERENCES:
patent: 5398011 (1995-03-01), Kimura et al.
patent: 6084281 (2000-07-01), Fullin et al.
patent: 6262463 (2001-07-01), Miu et al.
patent: 2002/0163408 (2002-11-01), Fujii et al.
Kogure Tomonari
Seki Tomonori
Nelms David
Nguyen Dao H.
Omron Corporation
Rosenthal & Osha L.L.P.
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