Pump circuits and methods for integrated circuits including...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Reexamination Certificate

active

06724242

ABSTRACT:

RELATED APPLICATION
This application claims the benefit of Korean Patent Application No. 2002-0031927, filed Jun. 7, 2002, the disclosure of which is hereby incorporated herein by reference in its entirety as if set forth fully herein.
FIELD OF THE INVENTION
This invention relates to integrated circuit devices such as integrated circuit memory devices, and more particularly to pump circuits and methods for integrated circuit devices such as integrated circuit memory devices.
BACKGROUND OF THE INVENTION
Integrated circuit devices such as integrated circuit memory devices are widely used for consumer and commercial applications. As is well known, an integrated circuit may receive an external power supply voltage, often referred to as a VCC voltage or VCC, for supplying power to the circuits thereof. As is also well known, it often is desirable to generate a boosted voltage, often referred to as a VPP voltage or VPP, internal to the integrated circuit, which is higher than the external power supply voltage. An internal voltage generator, often referred to as a pump circuit or a charge pump circuit, may be used to generate the VPP voltage.
U.S. Pat. No. 5,929,694 to Yanagawa et al. entitled Semiconductor Device Having Voltage Generation Circuit, describes a semiconductor device that operates in one of at least two different modes including a first mode and a second mode. The semiconductor device includes a first voltage generating circuit operating in the first mode and the second mode and having a power to supply a first amount of current in order to generate a predetermined voltage level, and a second voltage generating circuit operating only in the second mode and having a power to supply a second amount of current greater than the first amount of current in order to generate the predetermined voltage level, wherein the first voltage generating circuit increases the first amount of current in the second mode compared to in the first mode. See the Yanagawa et al. abstract. Also see the corresponding Japanese Patent No. 10-289574.
U.S. Pat. No. 5,920,226 to Mimura entitled Internal Voltage Generator With Reduced Power Consumption, describes an internal voltage generator wherein a first periodic pulse is rectified to generate an internal voltage by a charge pump circuit. A level detector is provided for detecting whether or not the internal voltage reaches a desired level. The charge pump circuit is controlled by a controller in accordance with the detection signal so that the internal voltage may take the desired level. A switch element switched by a second periodic pulse is provided in the current path of the level detector. A leakage current path for allowing a lower electric current than the electric current to flow through the former current path is provided between the output terminal of the charge pump circuit and a predetermined power supply terminal. See the Mimura abstract.
U.S. Pat. No. 6,429,725 to Tanzawa et al. entitled Pump Circuit With Active-Mode and Stand-By Mode Booster Circuits, describes a standby-mode circuit that is activated in both a standby mode and an active mode and boosts up a power supply voltage to generate a booster voltage and output it from an output terminal. An active-mode booster circuit is activated in the active mode. In the active-mode booster circuit, an NMOS transistor is first turned on in response to a reset signal supplied from a reset signal generation circuit and then a connection node of capacitors is reset to the power supply voltage by the NMOS transistor. The boost operation is then started to output the booster voltage from the output terminal. See the Tanzawa et al. abstract.
SUMMARY OF THE INVENTION
Some embodiments of the present invention provide boosted voltage generators and methods for an integrated circuit that are configured to boost an initial boosted voltage to a first boosted voltage in response to detecting a drop in the initial voltage. The first boosted voltage is then boosted to a second boosted voltage in response to a pulse. The second boosted voltage is then repeatedly boosted to approach the initial boosted voltage in response to an oscillating signal. Accordingly, stable boosted voltages may be generated.
Other embodiments of the invention provide circuits and methods for generating a boosted voltage for an integrated circuit, which generate a first oscillating signal, generate a second oscillating signal in response to an active pump signal, generate a high voltage pump signal in response to the first and second oscillating signals, generate a first boosted voltage in response to the high voltage pump signal, generate a second boosted voltage in response to the active pump signal, and combine the first and second boosted voltages. In some embodiments, a pulse also is generated in response to the active pump signal, and the first boosted voltage also is generated in response to the pulse.
Other embodiments of the present invention provide pump circuits and methods for an integrated circuit that include a standby mode voltage detector that is configured to detect a high voltage in a standby mode, to generate a standby mode voltage signal. An active mode voltage detector is configured to detect the high voltage in an active mode, to generate an active mode voltage signal. An active pump signal generator is configured to generate an active pump signal in response to the active mode voltage signal and an active mode signal. A first oscillator is enabled in response to the standby mode voltage signal. A second oscillator is enabled in response to the active pump signal. A high voltage pump signal generator is configured to receive an output of the first oscillator and an output of the second oscillator, and to generate a high voltage pump signal in response to the active mode signal. A high voltage pulse signal generator is configured to generate a high voltage pulse signal in response to the active pump signal. A first pump is configured to generate the high voltage in response to the high voltage pump signal and the high voltage pulse signal. A second pump is configured to generate the high voltage in response to the active pump signal. In some embodiments, the first oscillator is enabled in response to the standby mode voltage signal, and the second oscillator is enabled in response to the active pump signal.


REFERENCES:
patent: 5877651 (1999-03-01), Furutani
patent: 5920226 (1999-07-01), Mimura
patent: 5929694 (1999-07-01), Yanagawa et al.
patent: 6320457 (2001-11-01), Yang
patent: 6429725 (2002-08-01), Tanzawa et al.
patent: 10-289574 (1999-07-01), None

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