Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-08-13
2004-01-20
Pham, Chi (Department: 2663)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S395700
Reexamination Certificate
active
06680949
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention is directed to a method and to a circuit arrangement for the transmission joint of message cells, which are allocated to virtual connections having different priorities, via at least one transmission line of an ATM system working according to an asynchronous transfer mode, whereby, during transmission via the respective transmission line, the message cells pass through a buffer memory individually allocated thereto.
In such an ATM system, a number of virtual connections, for which different demands are made with respect to the cell loss probabilities (different priorities), can be simultaneously established on a transmission line. For example, a cell loss probability of 10
−6
can be demanded for one of the virtual connections but no cell loss probability may be demanded for another virtual connection.
European Patent Application No. 0 641 099 discloses a method and an apparatus for the intermediate storage of data. In accord therewith, a data packet stored in a low-priority wait list is erased when an incoming data packet is allocated to a wait list with higher priority and the total length of the wait lists has exceeded a certain length. However, an optimum loading of the wait lists or of the buffer memories forming these is not possible with such a procedure.
European Patent Application No. 0 526 104 likewise discloses a method and an apparatus for the intermediate storage of data packets. A data packet an the lowest-priority wait list is discarded when the total length of the wait lists has exceeded a certain length. The newly added data packet is then written to the empty location in the wait list. However, an optimum loading of the wait lists or of the buffer memories forming these is likewise not possible with such a procedure.
SUMMARY OF THE INVENTION
It is an object of the present invention is to provide a method and a circuit arrangement for efficently loading the transmission lines of an ATM system and the buffer memories respectively allocated to these.
This object is achieved in accordance with the invention in a method of the species initially cited. Message cells are transmitted via a transmission line through a buffer memory individually allocated to the transmission line and having a specific message cell capacity. A message cell belonging to a high-priority virtual connection on the transmission line is received. A wait list allocated to a low-priority virtual connection of message cells stored in the buffer memory is selected upon receiving the message cell belonging to a high-priority virtual connection and upon the buffer memory achieving the specific message cell capacity. The selection depends on the number of message cells being stored in the buffer memory for the low-priority virtual connection. The message cells of said selected wait list are then discarded.
The invention thereby yields the advantage that, viewed overall, fewer connections are damaged on average by cell losses. Above all, in data traffic wherein data packets of a virtual connection are initially segmented before a transmission over the transmission line coming into consideration and the individual segments are subsequently transmitted in a respective message cell, discarding individual message cells is inefficient. In order to avoid data errors, namely, the receiver involved in a virtual connection must discard an entire data package damaged by cell loss. Moreover, the number of data packets transmitted error-free on average, i.e. data packets that suffer no cell loss, is increased.
Over and above this, the present invention avoids a random discard of individual message cells as a result whereof there would be high probability that many virtual connections would be disturbed.
Advantageous developments of the method according to the present invention derive from further embodiments of the invention
In further embodiments, all or all except a first of the message cells of a selected low-priority virtual connection are discarded.
In a further embodiment, a virtual connection having a greatest number of message cells is selected.
In a further embodiment, the selection depends on the priorities of the virtual connections and the number of message cells stored for the individual virtual connections.
The advantage is comprised in a further increase in the efficient loading of the transmission lines and the buffer memories allocated to them. What is achieved, for example, by discarding all except the first message cells of the selected low-priority virtual connection the continuity of the connecting paths can be checked adequately in an ATM system.
Over and above this, present invention makes it possible for those virtual connections for which many message cells are being buffered at the moment and that, thus, contribute greater than others to an overload, are preferably utilized for discarding message cells. For example, these are virtual connections that do not adhere to defined connection parameters, for example that exceed the cell rate defined as a maximum for the respective virtual connection.
The above-stated object is achieved in a circuit arrangement operated in accordance with the inventive method. The advantages thereby comprised in what is a low circuit-oriented outlay overall in order to efficiently load the individual transmission lines and the buffer memories allocated to them.
REFERENCES:
patent: 5521916 (1996-05-01), Choudhury et al.
patent: 5724358 (1998-03-01), Headrick et al.
patent: 5793748 (1998-08-01), Murase
patent: 5872769 (1999-02-01), Caldara et al.
patent: 6058114 (2000-05-01), Sethuram et al.
patent: 6295295 (2001-09-01), Wicklund
patent: 18 28 862 (1995-03-01), None
patent: 0 526 104 (1993-02-01), None
patent: 0 596 200 (1993-07-01), None
patent: 0 641 099 (1994-08-01), None
Chao et al. “A New QoS-Guaranteed Cell Discard Strategy: Self-Calibrating Pushout”. IEEE Glocal Telecommunications Conference. Nov. 28, 1994-Dec.02, 1994. pp. 929-934.*
Patent Abstracts of Japan, vol. 017, No. 403 (E-1254), Aug. 26, 1992 & JP04-133500A (NEC Tohoku, Ltd.) May 7, 1992.
Qualitatssicherung Null Fehler in Hühnerfutter! Messen, Prüfen, Automatisieren. Nov. 12, 1997, p. 36.
Ferris Derrick W
Fish & Richardson P.C.
Pham Chi
LandOfFree
Method and circuit arrangement for the transmission of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and circuit arrangement for the transmission of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit arrangement for the transmission of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3218435