Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-12-04
2004-01-06
Mengistu, Amare (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C315S169100, C315S169400
Reexamination Certificate
active
06674418
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a plasma display apparatus having a plasma display panel.
2. Description of the Related Art
In recent years, a thin type display device has been requested associated by the realization of a large screen of a display apparatus and various thin type display devices have been put into practical use. Attention is paid to a plasma display panel of an AC discharge type as one of the thin type display devices.
FIG. 1
is a diagram showing a construction of a plasma display apparatus having a plasma display panel (designated as a PDP hereinafter).
In
FIG. 1
, a PDP
10
comprises: m column electrodes D
1
to D
m
; and n row electrodes X
1
to X
n
and n row electrodes Y
1
to Y
n
which are arranged so as to cross the column electrodes, respectively. With respect to the row electrodes X
1
to X
n
and the row electrodes Y
1
to Y
n
, first to nth display lines in the PDP
10
are constructed by pairs of row electrodes X
i
(1≦i≦n) and Y
i
(1≦i≦n). A discharge space filled with discharge gas is formed between the column electrode D and the row electrodes X and Y. The discharge space has a structure such that a discharge cell serving as a display pixel is formed at a crossing portion of each row electrode pair and the column electrode.
Each discharge cell has only two states of “light emission” and “non-light emission” because a light emission is performed by using a discharge phenomenon. That is, only luminance of two gradations of the lowest luminance (non-light emitting state) and the highest luminance (light emitting state) is realized.
A driving apparatus
100
, therefore, executes a gradation driving using a subfield method in order to allow the PDP
10
to realize a luminance display of a halftone corresponding to a supplied video signal. As subfield methods, there are a selective erasure address method and a selective write address method. According to the selective erasure address method, wall charges are previously formed in all discharge cells (all-resetting step Rc) and the wall charges in each discharge cell are selectively erased in response to an input video signal (pixel data writing step Wc). According to the selective write address method, wall charges in all discharge cells are previously extinguished (all-resetting step Rc) and the wall charges are selectively formed in each discharge cell in response to an input video signal (pixel data writing step Wc).
In the subfield method, the supplied video signal is converted into pixel data of, for example, 4 bits corresponding to each pixel and one field is divided into four subfields SF
1
to SF
4
as shown in
FIG. 2
in correspondence to each bit digit of the 4 bits. At this time, as shown in
FIG. 2
, the number of executing times of light emission corresponding to a weight of the pixel data bits is allocated to each of the subfields SF
1
to SF
4
. The discharge cells are light-emitted every subfield in accordance with a logic level of the pixel data bit corresponding to the subfield.
FIG. 3
is a diagram showing various kinds of driving pulses which are applied to the row electrode pairs and the column electrodes of the PDP
10
in one subfield in order to drive the driving apparatus
100
by, for example, the selective erasure address method and showing timing for applying those pulses.
First, in the all-resetting step Rc, the driving apparatus
100
applies a reset pulse RP
x
of a negative polarity whose trailing change is mild and which is shown in
FIG. 3
all at once to each of the row electrodes X
1
to X
n
. The driving apparatus
100
, further, applies a reset pulse RP
Y
, of a positive polarity whose leading change is mild and which is shown in
FIG. 3
all at once to each of the row electrodes Y
1
to Y
n
simultaneously with the application of the reset pulse PR
X
. In accordance with the application of the reset pulses RP
X
and RP
Y
, all of the discharge cells of the PDP
10
are discharged for resetting. After termination of the reset discharge, wall charges of a predetermined amount are uniformly formed in each discharge cell and the formed wall charges are held.
By the execution of the all-resetting step Rc, all of the discharge cells in the PDP
10
are initialized to a state where a light emission (sustaining discharge) is possible (hereinafter, referred to as a “light emitting cell” state) in a light emission sustaining step Ic, which will be explained hereinlater.
In the pixel data writing step Wc, the driving apparatus
100
separates each bit of the pixel data of 4 bits in correspondence to each of the subfields SF
1
to SF
4
and generates a pixel data pulse having a pulse voltage according to a logic level of the bit. For example, in the pixel data writing step Wc of the subfield SF
1
, the driving apparatus
100
generates the pixel data pulse having the pulse voltage according to the logic level of the first bit of the pixel data. At this time, the driving apparatus
100
generates the pixel data pulse having the pulse voltage of a high voltage if the logic level of the first bit is equal to “1” and generates the pixel data pulse having the pulse voltage of a low voltage (0 volt) if the logic level of the first bit is equal to “0”. The driving apparatus
100
sequentially applies the pixel data pulses as pixel data pulse groups DP
1
to DP
n
as many as each display line corresponding to each of the first to nth display lines to the column electrodes D
1
to D
M
as shown in FIG.
3
. The driving apparatus
100
, further, generates a scanning pulse SP of a negative polarity as shown in
FIG. 3
synchronously with the applying timing of each of the pixel data pulse groups DP and sequentially applies the scanning pulse to the row electrodes Y
1
to Y
n
. At this time, a discharge (selective erasure discharge) is caused only in the discharge cell at the crossing portion of the display line to which the scanning pulse SP has been applied and the “column” to which the pixel data pulse of the high voltage has been applied. By the selective erasure discharge, the wall charges held in the discharge cell are extinguished. That is, the discharge cell is shifted to a state where the light emission (sustaining discharge) is impossible (hereinafter, referred to as a “non-light emitting cell” state) in the light emission sustaining step Ic, which will be explained hereinlater. The selective erasure discharge is not caused in the discharge cell to which the pixel data pulse of the low voltage has been applied although the scanning pulse SP was applied. That is, the discharge cell sustains the state where it has been initialized in the all-resetting step Rc, that is, the “light emitting cell” state.
That is, according to the pixel data writing step Wc, each discharge cell of the PDP
10
is set to either the “light emitting cell” state or the “non-light emitting cell” state in accordance with the pixel data based on the input video signal.
Subsequently, in the light emission sustaining step Ic, the driving apparatus
100
alternately and repetitively applies a sustaining pulse IP
X
of a positive polarity and a sustaining pulse IP
Y
of a positive polarity to the row electrodes X
1
to X
n
and the row electrodes Y
1
to Y
n
as shown in FIG.
3
. In one subfield, the number of times (period) of applying the sustaining pulses IP
X
and IP
Y
is set in accordance with a weight of each subfield as shown in FIG.
2
. Only the discharge cell in which the wall charges exist, namely, only the discharge cell in the “light emitting cell” state discharges for the sustaining light emission each time the sustaining pulses IP
X
and IP
Y
are applied. That is, only the discharge cell set to the “light emitting cell” state in the pixel data writing step Wc repeats the light emission associated by the sustaining discharge the number of times set in correspondence to the weight of each subfield as shown in FIG.
2
and sustains the light emitting state.
The driving apparatus
100
executes the above operation every subfield. In
Kitagawa Mitsushi
Tokunaga Tsutomu
Mengistu Amare
Pioneer Corporation
Sughrue & Mion, PLLC
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