Wave transmission lines and networks – Coupling networks – Frequency domain filters utilizing only lumped parameters
Reexamination Certificate
2002-07-29
2004-09-07
Pascal, Robert (Department: 2817)
Wave transmission lines and networks
Coupling networks
Frequency domain filters utilizing only lumped parameters
C333S172000
Reexamination Certificate
active
06788168
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of integrated filters, the passive components of which (resistors and capacitors) are formed in the same integrated circuit, arranged in a package.
An example of application of the present invention relates to high-frequency transmissions (for example, mobile telephony).
The present invention will be described in relation to an application to low-pass filters. It more generally relates to low-pass, band-pass, and composite filters.
2. Discussion of the Related Art
A disadvantage of conventional integrated filters is that their packaging degrades their frequency response.
FIG. 1
shows an example of an equivalent electric diagram of a low-pass filter
1
made in the form of an integrated circuit and arranged in a package. The example of
FIG. 1
relates to a so-called &pgr; filter, which includes two capacitive elements C
1
and C
2
having first electrodes
2
and
3
connected together to ground, and having second electrodes
4
and
5
forming the input-output terminals of the filter, connected to each other by a resistor R. Resistor R and capacitors C
1
and C
2
are integrated on a chip, symbolized by dotted lines
10
in
FIG. 1
, having two pads
11
and
12
corresponding to electrodes
4
and
5
and having one pad
13
corresponding to electrodes
2
and
3
of the capacitors. The cut-off frequency of this &pgr; filter is, with capacitors C
1
and C
2
of same value C, equal to ½&pgr;RC.
In the packaging (symbolized by a stripe-dot line
20
) of chip
10
, each pad
11
and
12
is connected to a corresponding terminal
21
and
22
by a wire (for example, a gold wire), the parasitic inductance of which is symbolized by elements L
1
and L
2
. On the side of terminal
13
, the integrated circuit chip is generally provided on a so-called rear surface of a ground plane. The connection of pad
13
to a terminal
23
of package
20
has an equivalent inductance L
3
corresponding to the series connection of the different parasitic inductances of connection to ground terminal
23
. These parasitic inductances differ according to the type of package, but are always present.
A parasitic inductance Li of the printed circuit track on which the package is assembled and which connects terminal
23
to ground is present outside of the package. This inductance is in series with inductance L
3
.
FIG. 2
shows the transfer function of the low-pass filter of
FIG. 1
, once assembled, illustrating its frequency response. It can be considered that the attenuation (curve in full line
27
) of the filter as a function of frequency is obtained by superposing the characteristic of an ideal low-pass filter having a cut-off frequency fc (dotted lines
25
) and the transfer function of the ground return inductance (stripe-dot line
26
) corresponding to the sum of inductances L
3
and Li. Thus, from a frequency f1 where curve
25
crosses curve
26
, the filter attenuation decreases; the low-pass effect is then lost. The position of frequency f1 in the filter response of course depends on the sizing of the filter elements and, more specifically, on the respective values of capacitors C
1
and C
2
and of parasitic inductances L
3
and Li. Inductance L
3
generally is of several tenths of nanohenrys (between 0.2 and 0.8 nH).
The effect of the parasitic inductances is particularly disturbing for applications where the frequency spectrum to be cut-off extends to frequencies greater than some hundred MHz. Such is the case, for example, for mobile telephony or other continuous spectrum applications.
At such frequencies, the ground return impedance linked to inductances L
3
and Li can no longer be neglected (the impedance of an inductance increases when the frequency increases). It can be considered that electrodes
2
and
3
of capacitors C
1
and C
2
are disconnected from the ground. These capacitors then are in series between terminals
4
and
5
and short-circuit resistor R (the capacitor impedance decreases when the frequency increases).
A current solution to reduce the effect of ground return parasitic inductances consists of increasing the access surface area between the integrated circuit chip and the ground. In practice, the number of connections between pad
13
of the integrated circuit chip (
10
,
FIG. 1
) and ground connection terminal
23
is increased.
FIGS. 3 and 4
illustrate, respectively in a very simplified top view and as an equivalent electric diagram, a conventional example of an integrated circuit implementing this conventional solution. In the example of
FIG. 3
, it is assumed that integrated circuit chip
10
is laid, by its ground plane, on a lead frame
31
. Pads
11
and
12
of the chip are connected, by wires
32
and
33
, to respective terminals
21
and
22
of the package. For the ground connection, four terminals
34
,
35
,
36
and
37
of the package, which are connected to the central portion of lead frame
31
, and thus to the ground plane of chip
10
, are provided in this example. The ground connection corresponds the parallel connection of several (here, 4) series connections of inductances L
3
and Li (inductances Li generally being different from one another). The first respective terminals of inductances L
3
are connected together to pad
13
of chip
10
. Inductances L
3
are thus all connected to common electrodes
2
and
3
of capacitors C
1
and C
2
of the filter. The second respective terminals of inductances L
3
are individually connected to terminals
34
to
37
of the package. Outside of the package, each terminal
34
to
37
is grounded by a parasitic inductance Li of the printed circuit track.
Although not shown in
FIG. 4
, parasitic inductances L
1
and L
2
of connection of input-output pads
11
and
12
of chip
10
are of course present.
FIG. 5
illustrates the frequency response of the filter of
FIGS. 3 and 4
, once assembled. The general outlook of the characteristic is identical to that of FIG.
2
. The general response (curve in full line
47
) still corresponds to the superposition of the response of an ideal filter (curve in dotted lines
25
) and of an inductance (curve in strip-dot lines
46
). As compared to
FIG. 2
, the only contribution is the slight shift in the frequency f′1 at which the attenuation starts decreasing towards higher frequencies. This results from the parallel connections of inductances L
3
+Li. For a given package and assembly, there is no reason for inductances L
3
and Li to be much smaller than in the case of
FIGS. 1 and 2
. Accordingly, considering that the parasitic inductances of connection of terminal
13
to terminals
34
,
35
,
36
, and
37
have the same value L
3
and that inductances Li are identical, the resulting parasitic inductance is approximately divided by four with respect to the case of FIG.
2
. Frequency f′1 is then shifted by one octave (for example, from 100 MHz to 200 MHz).
The fact of multiplying the ground access terminals reduces, by the parallel connection of inductances, the resulting parasitic inductance of connection to ground. However, the benefit of such a solution remains in practice limited, due to the poor efficiency obtained, that is, to the low ratio between the resulting decrease in parasitic inductance and the necessary increase in surface area (more specifically, the increase in the number of package terminals). Further, the effect of the short-circuiting of resistor R by the disconnection from the ground of capacitors C
1
and C
2
remains.
SUMMARY OF THE INVENTION
The present invention aims at overcoming the disadvantages of known filters formed in integrated circuits. The present invention more specifically aims at providing a novel low-pass or band-pass filter structure that reduces or minimizes the prejudicial effects of parasitic inductances linked to the ground connection of the filter.
The present invention also aims at providing a solution which is compatible with all known integration and packaging techniques.
The prese
Guitton Fabrice
Karoui Choukri
Jorgenson Lisa K.
McClellan William R.
Pascal Robert
STMicroelectronics S.A.
Takaoka Dean
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