Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-10-04
2004-04-27
Bella, Matthew C. (Department: 2676)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S045000, C313S498000, C313S500000, C313S503000, C313S505000, C313S512000
Reexamination Certificate
active
06727871
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a luminescence display apparatus comprising electroluminescence elements and thin-film transistors.
2. Description of the Related Art
In recent years, electroluminescence (referred to hereinafter as EL) display apparatuses employing EL elements as emissive elements have attracted attention as being the display apparatuses to replace CRTs and LCDs, and the research and development also have advanced on EL display apparatuses comprising thin-film transistors (referred to hereinafter as TFT) as switching elements to drive the EL elements.
FIG. 1
shows an equivalent circuit of an EL display apparatus comprising a conventional EL element and TFT.
FIG. 1
is an equivalent circuit of an EL display apparatus comprising a first TFT
130
, a second TFT
140
, and an organic EL element
160
, and shows the circuitry near a gate signal line Gn of row n and a drain signal line Dm of column m.
The gate signal line Gn supplying a gate signal and the drain signal line Dm supplying a drain signal are perpendicular to each other, and near the intersection of both signal lines are provided the organic EL element
160
and the TFTs
130
,
140
driving the organic EL element
160
.
The first TFT
130
, which is a switching TFT, comprises gate electrodes
131
connected to the gate signal line Gn and supplied with gate signals, a drain electrode
132
connected to a data signal line (drain signal line) Dm and supplied with data signals, and a source electrode
133
connected to a gate electrode
141
of the second TFT
140
.
The second TFT
140
, which is an organic EL element driver TFT, comprises the gate electrode
141
connected to the source electrode
133
of the first TFT
130
, a source electrode
142
connected to an anode
161
of the organic EL element
160
, and a drain electrode
143
connected to a driving power supply
150
that is supplied to the organic EL element
160
.
Furthermore, the organic EL element
160
comprises the anode
161
connected to the source electrode
142
, a cathode
162
connected to a common electrode
164
, and an emissive element layer
163
sandwiched between the anode
161
and the cathode
162
.
Furthermore, a storage capacitor
170
is provided with one electrode
171
connected between the source electrode
133
of the first TFT
130
and the gate electrode
141
of the second TFT
140
and another electrode
172
connected to a common electrode
173
.
The driving method of the circuit shown in the equivalent circuit of
FIG. 1
will now be described. When the gate signal from the gate signal line Gn is applied to the gate electrode
131
, the first TFT
130
turns on. As a result, the data signal from the data signal line Dm is supplied to the gate electrode
141
and the voltage of the gate electrode
141
becomes identical to the voltage of the data signal line Dm. A current proportional to the voltage value supplied to the gate electrode
141
is then supplied from the driving power supply
150
to the organic EL element
160
. As a result, the organic EL element
160
emits light at an intensity in accordance to the magnitude of the data signal.
A conventional EL display apparatus will be described next with reference to
FIGS. 2
,
3
A, and
3
B.
FIG. 2
is a top view showing one pixel of the conventional EL display apparatus. In
FIG. 2
, a gate signal line
51
corresponds to the gate signal line Gn, a data signal line
52
corresponds to the data signal line Dm, a driving power supply
53
corresponds to the driving power supply
150
, an electrode
54
corresponds to the electrode
172
of the storage capacitor
170
, and an anode
61
corresponds to the anode
161
of the organic EL element
160
. The gate signal lines
51
are arranged in rows and the data signal lines
52
and the driving supplies
53
are arranged in columns. The storage capacitor and the emissive element layer are arranged within the area thus partitioned. The storage capacitor is formed from a semiconductor film
13
and the electrode
54
. The semiconductor film
13
is connected to the data signal line
52
via a contact C
1
, and a gate electrode
11
is arranged between a drain
13
d
and a source
13
s
.
A semiconductor film
43
is connected to the driving power supply
53
via a contact C
2
, and a gate electrode
41
, which is connected to the semiconductor film
13
, is arranged between a dragin
43
d
and a source
43
s
. The semiconductor film
43
is connected to the anode
61
of the organic EL element via a contact C
3
.
FIG. 3A
is a cross-sectional view along line A—A of FIG.
2
. On a transparent substrate
10
is formed the semiconductor film
13
, on which is covered with and formed a gate insulating film
12
. On the gate insulating film
12
are formed gate electrodes
11
, which branch from the gate signal line
51
, and the storage capacitor electrode
54
, on which is covered with and formed an interlayer insulating film
15
. On the interlayer insulating film
15
is arranged the data signal line
52
, which connects to the semiconductor film
13
via the is contact C
1
. On these is covered with and formed a pilanarization insulating film
17
.
FIG. 3B
is a cross-sectional view along line B—B of FIG.
1
. On the substrate
10
are laminated in sequence the semiconductor film
43
, the gate insulating film
12
, the gate electrode
41
, and the interlayer insulating film
15
, and on the interlayer insulating film
15
are formed the data signal line
52
and the driving power supply
53
, on which is covered with and formed the planarization insulating film
17
. On the planarization insulating film
17
is arranged an anode
61
, which is connected to the semiconductor film
43
via the contact C
3
. On the anode
61
is arranged an emissive element layer
66
, which has a laminated structure of a first hole transport layer
62
, a second hole transport layer
63
, an emissive layer
64
, and an electron transport layer
65
. A cathode
67
is arranged so as to cover them.
The anode
61
of the pattern shown in
FIG. 2
is generally formed using a method in which an ITO film is first formed on the entire surface, and after forming a positive photoresist in predetermined shape, wet etching is performed using chemicals.
However, when forming the organic EL element in this manner, the emissive element layer
66
that is formed on the anode
61
is extremely thin at approximately 200 nm so that coverage at the step portion with the planarization insulating film
17
at the edge of the anode
61
deteriorates. Thus, at the points indicated by the arrows in
FIG. 4
, since the vertex of the anode
61
and the vertex of the cathode
67
face each other in closer proximity than at any other location, field concentration occurs here causing a problem where the emissive layer
64
positioned between layers deteriorates rapidly. As the coverage deteriorates further, the emissive element layer
66
ruptures as shown in the figure, and the cathode
67
provided on the upper layer shorts with the anode
61
to possibly cause this pixel to be defective and not display.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an EL display apparatus having long life and high yield by preventing shorts or localized deterioration of the emissive layer
64
due to the thickness of the anode.
The present invention solves the aforementioned problem and is an electroluminescence display apparatus comprising an emissive element (an electroluminescence element) laminated in sequence on the substrate with the first electrode, the emissive element layer (such as hole transport layer, emissive layer, and electron transport layer), and the second electrode, with the side faces of the first electrode inclined and becoming broader toward the substrate side.
The angle formed by the incline of the first electrode and the plane of the lower layer (and/or the substrate) is 10° to 45°, or further an angle of 25° to 35°. Furthermore, the side of the first el
Suzuki Koji
Yamada Tsutomu
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