Method and apparatus using integrated metrology data for...

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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C700S109000

Reexamination Certificate

active

06788988

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor manufacturing, and, more particularly, to a method and apparatus for acquiring metrology data using an integrated metrology tool for pre-process and post-process control.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today's manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Generally, a set of processing steps is performed on a group of semiconductor wafers, sometimes referred to as a lot. For example, a process layer composed of a variety of materials may be formed above a wafer. Thereafter, a patterned layer of photoresist may be formed above the process layer using known photolithography techniques. Typically, an etch process is then performed on the process layer using the patterned layer of photoresist as a mask. This etching process results in formation of various features or objects in the process layer. Such features may be used for a gate electrode structure for transistors. Typically, shallow trench isolation (STI) structures formed on the semiconductor wafers are filled by forming silicon dioxide using tetraethoxysilane (TEOS), over the wafer and in the STI structures. The manufacturing tools within a semiconductor manufacturing facility typically communicate with a manufacturing framework or a network of processing modules. Each manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which a manufacturing network is connected, thereby facilitating communications between the manufacturing tool and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a manufacturing process.
FIG. 1
illustrates a typical semiconductor wafer
105
. The wafer
105
typically includes a plurality of individual semiconductor die
103
arranged in a grid
150
. Photolithography steps are typically performed by a stepper on approximately one to four die locations at a time, depending on the specific photomask employed. Photolithography steps are generally performed to form patterned layers of photoresist above one or more process layers that are to be patterned. The patterned photoresist layer can be used as a mask during etching processes, wet or dry, performed on the underlying layer or layers of material, e.g., a layer of polysilicon, metal or insulating material, to transfer the desired pattern to the underlying layer. The patterned layer of photoresist is comprised of a plurality of features, e.g., line-type features, such as a polysilicon line, or opening-type features, that are to be replicated in an underlying process layer.
In some cases, pre-process manufacturing data relating to semiconductor wafers
105
that are about to be processed is acquired. For example, before a chemical/mechanical polishing (CMP) operation is performed on a semiconductor wafer, generally a pre-polish, or pre-process manufacturing data acquisition step is performed. In many cases, the pre-process data is used to perform comparisons with post-process data to determine whether a particular process was accurately performed on a semiconductor wafer
105
. Similarly, after performing certain types of manufacturing processes, such as a deposition process, post-manufacturing data or post-process data (e.g., post-deposition data), is acquired. In these cases, post-process data is useful in determining whether a particular manufacturing process has been performed within predetermined specifications.
Turning now to
FIG. 2
, a set of semiconductor wafers
105
to be processed is generally acquired by a manufacturing system (block
210
). Many times, the manufacturing system performs an offline metrology data acquisition process (block
220
) to collect pre-process data before performing certain types of processes, such as CMP processes. In some cases, only after offline metrology data acquisition is performed, will the manufacturing system perform a process step on the semiconductor wafers (block
230
). In many cases, the manufacturing system then acquires offline metrology data subsequent to the processing (i.e., acquiring post-process data, such as post-deposition manufacturing data) (block
240
).
Generally, the order and manner in which current manufacturing systems acquire pre-process and post-process data can become time consuming and cause inefficiencies and/or delays during semiconductor manufacturing. For example, acquiring offline metrology data and analyzing the offline metrology data to determine if a particular process has been implemented under acceptable margins of tolerance can delay a manufacturing process flow. Delays suffered during a manufacturing process flow may result in increased manufacturing expenses. Furthermore, the prior art routine described by
FIG. 2
sometimes causes the manufacturing system to acquire metrology data from different metrology tools for the same set of semiconductor wafers. This can cause calibration errors partially because metrology tools may acquire slightly different data from one process to another. Calibrations of different metrology tools may vary, causing inaccuracies in the analysis of the acquired metrology data. This can cause inaccuracies during metrology data analysis, resulting in additional errors in the manufacturing of semiconductor wafers
105
.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
SUMMARY OF THE INVENTION
In one aspect of the present invention, a method is provided for acquiring pre-process and post-process integrated metrology data. A lot of semiconductor wafers is provided. A pre-process integrated metrology data acquisition from a first semiconductor wafer within the lot of semiconductor wafers is performed. A process operation on the first semiconductor wafer is performed at least partially during the process of acquiring pre-process metrology data from a second semiconductor wafer within the lot of semiconductor wafers. Post-process integrated metrology data is acquired from the first semiconductor wafer in response to processing of the first semiconductor wafer. The pre-process and the post-process metrology data is analyzed for evaluation of the process operation performed on the first semiconductor wafer.
In another aspect of the present invention, a system is provided for acquiring pre-process and post-process integrated metrology data. The system of the present invention comprises: a process controller to perform an integrated metrology data acquisition operation comprising: performing a pre-process integrated metrology data acquisition from a first semiconductor wafer within a lot of semiconductor wafers; performing a process operation on the first semiconductor wafer at least partially during the process of acquiring pre-process metrology data from a second semiconductor wafer within the lot of semiconductor wafers; acquiring post-process integrated metrolog

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