Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices
Reexamination Certificate
2002-08-21
2004-05-18
Vigushin, John B. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
For plural devices
C257S778000, C257S783000, C257S785000, C174S258000, C174S260000, C361S783000, C361S795000
Reexamination Certificate
active
06737741
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a technique effective when applied to an electronic device and a semiconductor device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes.
As a mounting method of mounting a semiconductor chip on the mounting face of a wiring board, there is the flip chip method which is effected by interposing bump electrodes between the electrode pads of the wiring board and external terminals of the semiconductor chip. This flip chip method is classified into the CCB (Controlled Collapse Bonding) method and the FCA (Flip Chip Attach) method.
By the CCB method, the electrode pads of the wiring board and the external terminals of the semiconductor chip are fixed by the bump electrodes, and that they are electrically and mechanically connected. Specifically, first, the bump electrodes having a ball shape and made of a metallic material having a composition of lead (Pb)-tin (Sn) are formed on the external terminals of the semiconductor chip. Next, the semiconductor chip is disposed on the wiring board so that the bump electrodes are sandwiched between the electrode pads of the wiring board and the external terminals of the semiconductor chip. Next, heat treatment is executed to melt the bump electrodes thereby to fix the electrode pads of the wiring board and the external terminals of the semiconductor chip. By this CCB method, the electrode pads of the wiring board and the external terminals of the semiconductor chip are fixed by the bump electrodes. As a result, the thermal stress produced by the difference in the coefficient of thermal expansion between the wiring board and the semiconductor chip may concentrate on the bump electrodes, thereby breaking the bump electrodes. In the CCB method, therefore, attempts have been made to compensate the mechanical strength of the bump electrodes with that of a resin by fixing the electrode pads of the wiring board and the external terminals of the semiconductor chip with the bump electrodes and then by filling the clearance between the wiring board and the semiconductor chip with the resin. This technique is called the “under-fill structure” and is utilized in the technique of packaging a semiconductor device. Such a semiconductor device of this under-fill structure is disclosed, for example, in
Denshi Zairyo [
on pp. 14 to 19, April issue, 1996], issued by Kogyo Chosakai.
In the FCA method, the bump electrodes formed on the external terminals of the semiconductor chip are pressed to the electrode pads of the wiring board to connect them electrically and mechanically. Specifically, first, the bump electrodes having a stud bump structure made of gold (Au) are formed on the external terminals of the semiconductor chip. Next, the semiconductor chip is so disposed on the wiring board through a sheet-shaped adhesive made of a thermosetting resin that the bump electrodes are sandwiched between the electrode pads of the wiring board and the external terminals of the semiconductor chip. Next, the semiconductor chip is thermally bonded to set the adhesive, with the bump electrodes connected with the electrode pads of the wiring board. In the adhesive restoring the room temperature state, a compression force such as a thermal shrinkage force or a thermosetting shrinkage force is generated to press the bump electrodes to the electrode pads of the wiring board. By this FCA method different from the foregoing CCB method, the electrode pads of the wiring board and the external terminals of the semiconductor chip are not fixed by using the bump electrodes, so that the thermal stress caused by the difference in the coefficient of thermal expansion between the wiring board and the semiconductor chip does not concentrate on the bump electrodes. Simultaneously the step of connecting the bump electrodes with the electrode pads of the wiring board and the step of filling the clearance between the wiring board and the semiconductor chip with the resin are conducted. This FCA method is effective in manufacturing an electronic device such as a memory module or CPU (Central Processing Unit) module in which a plurality of semiconductor chips are mounted over a wiring board.
Here, the FCA method is disclosed in Japanese Patent Laid-Open Nos. 4-345041/1992 and 5-175280/1993, for example.
SUMMARY OF THE INVENTION
We have investigated the FCA method and have found out the following problems.
Since the adhesive filled in the clearance between the wiring board and the semiconductor chip is made of a resin having a higher coefficient of thermal expansion than that of the bump electrodes, the expansion of the adhesive in the thickness direction is larger than that of the bump electrodes in the height direction. During the temperature cycle test, therefore, clearances are established between the electrode pads of the wiring board and the bump electrodes, thereby causing defective connections between the electrode pads of the wiring board and the bump electrodes.
The bump electrodes are held in press contact with the electrode pads of the wiring board by the thermal shrinkage or thermosetting shrinkage force of the adhesive. Since the amount of change of expansion and shrinkage due to the heat change of the bump electrodes is larger than that of the adhesive, plastic deformation is caused at the ends (on the electrode pad side of the wiring board) of the bump electrodes as a result of the repeated expansion and shrinkage during the temperature cycle test, so that the height of the bump electrodes decreases. As a result, the clearance is established between the electrode pads of the wiring board and the bump electrodes, causing the defective connection between the electrode pads of the wiring board and the bump electrodes.
An object of the invention is to provide a technique capable of enhancing the reliability of the connection between the electrode pads of the wiring board and the bump electrodes.
The foregoing and other objects and novel features of the invention will become apparent from the following description to be made with reference to the accompanying drawings.
A representative aspect of the invention to be disclosed herein will be briefly described in the following.
There is provided an electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes, wherein there are formed recesses in the electrode pads, and in the recesses the electrode pads are connected to the bump electrodes. The electrode pads are formed on the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.
By this means, the clearance between the wiring board and the semiconductor chip can be narrowed to an extent corresponding to the depth of the recesses, thereby reducing the thickness of the adhesive sandwiched between the wiring board and the semiconductor chip. As a result, the expansion of the adhesive in the thickness direction can be suppressed, thereby preventing defective connection between the electrode pads of the wiring board and the bump electrodes during the temperature cycle test, and enhancing the reliability of connection therebetween.
Since the amount of change of expansion and shrinkage of the adhesive due to heat change can be reduced, moreover, it is possible to suppress the plastic deformation, which might otherwise be caused by repeated expansion and shrinkage during the temperature cycle test, of the ends (on the electrode pad side of the wiring board).
REFERENCES:
patent: 4929999 (1990-05-01), Hoeberechts et al.
patent: 5714252 (1998-02-01), Hogerton et al.
patent: 5766982 (1998-06-01), Akram et al.
patent: 5874780 (1999-02-01), Murakami
patent: 5926694 (1999-07-01), Chigawa et al.
patent: 599416
Hayashida Tetsuya
Imasu Satoshi
Takeura Shinobu
Yamagiwa Akira
Yoshida Ikuo
Hitachi , Ltd.
Vigushin John B.
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