Microprogrammable floating point arithmetic unit capable of perf

Details Microprogrammable floating point arithmetic unit capable of perf Microprogrammable floating point arithmetic unit capable of perf

1978-01-05

1979-07-17

Smith, Jerry

Boots, shoes, and leggings

364200, 364749, G06F 748, G06F 900

Patent

active

041617843

ABSTRACT:
A scientific processing unit includes a microprogrammable arithmetic processing apparatus for performing floating point arithmetic operations with operands in long and short form. The apparatus includes a microprogrammable control section and a plurality of microprocessor arithmetic and logic unit chip stages organized into two sections and carry look-ahead circuits coupled thereto. One section includes a predetermined number of series-coupled stages connected to process exponent values or long mantissa values. The other section includes another predetermined number of series coupled stages connected to process short mantissa values. Control circuits interconnect the stages of both sections and connect to the carry look-ahead circuits and to the microprogrammed control section. During the performance of an arithmetic operation, the control circuits in response to signals from the control section, selectively split the two sections and inhibit the propagation of carries generated by the carry look-ahead circuits for operation of both sections independently and as a single unit as desired for efficient execution of the arithmetic operation.

REFERENCES:
patent: 3234370 (1966-02-01), Erickson
patent: 3287703 (1966-11-01), Slotnick
patent: 3725649 (1973-04-01), Deerfield
patent: 3739352 (1973-06-01), Packard

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