Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2000-01-18
2004-09-14
Thomas, Tom (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S209000, C257S530000, C257S665000, C361S626000, C361S630000, C361S641000, C361S833000, C361S837000
Reexamination Certificate
active
06791157
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to integrated circuits and more particularly to integrated circuits packaging.
2. Description of the Related Art
Integrated circuits such as microprocessors can be run at different clock speeds and with different supply voltages. The determination of what is the appropriate clock speed and appropriate voltage depends on many factors. A higher clock speed requires a higher supply voltage. In addition, the higher clock speed results in additional heat and power being dissipated. Microprocessors utilized in mobile applications are particularly sensitive to power dissipation and generally require the lowest power dissipation and thus require the lowest supply voltage that can achieve the rated clock speed. Microprocessors used in desktop applications are less sensitive to power dissipation considerations.
In general, microprocessor product yield, performance (MHz) and reliability are affected by the voltage supply setting. Within a range of only several hundred millivolts, dramatic differences can be seen in yield, performance and reliability, even from the same wafer lot. Choosing the best voltage is usually a compromise of yield, performance and reliability since the same value of voltage is usually chosen for a large population.
A higher percentage of a given population of microprocessors could operate at higher performance levels (thus creating higher revenue) if each microprocessor could operate at its own specific voltage. One solution would be to mark each processor with a number or symbol indicating its voltage and/or speed rating. However, that provides no guarantee that the appropriate voltage is supplied to the microprocessor in the final system.
Referring to
FIG. 1
, one prior art approach for providing the appropriate voltage and frequency values in a computer system is illustrated. Central processing unit (CPU)
101
receives bus frequency signals
103
(BF[
2
:
0
]), which provide a multiplier used by the processor to multiply a bus clock (not shown). The multiplied bus clock is used by the CPU to clock its internal logic. CPU
101
also receives core voltage
105
(commonly referred to in x86 architectures as Vcc2) from CPU core voltage regulator
107
. Other voltages, which are typically supplied to the CPU, e.g., Vcc3 (I/O voltage) are not shown. Core voltage regulator
107
is programmable and receives voltage control inputs
109
(also referred to as voltage ID (VID) signals) which determine the voltage level supplied to CPU
101
. The values for the both the VID signals and the BF pins are provided by the settings of jumpers
111
.
It is conceivable to set the jumpers to correspond to the marking (number or symbol) on the processor that indicates its voltage and/or speed rating. However, that approach provides no guarantee that appropriate voltage and frequency settings will be utilized. In fact, certain unscrupulous suppliers of computer systems have been known to provide systems having higher than recommended voltages and frequencies. Since companies typically qualify chips at certain voltage and frequencies, such over clocking or excessive voltage can result in shorter product lifetimes, decreased reliability and excessive product returns.
Providing information to users, which specifies the correct voltage and hoping that the correct voltage is subsequently supplied to the processor by circuitry on the board, is subject both to intentional misuse and unintentional error. In addition, the more possible voltage settings that are provided, the greater the possibility for error.
An additional factor to be considered is that if information on the preferred operating voltage and frequency for a specific chip is available only after testing that chip, programming that information on the die after testing requires that additional processing steps be performed on the die. Those additional processing steps may cause increased cost.
Thus, it would be desirable to be able to specify the correct voltage for a processor and to minimize the opportunity for deliberate over clocking or over voltage and to minimize the possibility of error. Further, it would be desirable to obtain higher aggregate performance from a given population of microprocessors by specifying the proper voltage that individual processors should receive without unduly complicating the manufacturing process.
SUMMARY OF THE INVENTION
Accordingly, the invention provides in one embodiment, a package for mounting at least one integrated circuit die. The package includes at least one one-time programmable element, such as a fuse, having a first and a second end separated by a programmable link. The first end of the one-time programmable element is coupled to a power supply voltage node in the package. The second end of the programmable element may be coupled to an external package connection (e.g., a package pin) and/or to an internal package node that connects to an input terminal of the integrated circuit die when the integrated circuit die is mounted.
In another embodiment, a package for mounting at least one integrated circuit die includes at least one programmable element pair having a first and second programmable element. One end of each programmable element is coupled together through an internal package node. A second end of the first programmable element is coupled to a first internal power supply node and a second end of the second programmable element is coupled to a second internal power supply node. The internal package node may be coupled to an external package connection (e.g., a package pin) and/or to another internal package node that connects to an input terminal of the integrated circuit die when the integrated circuit die is mounted.
In still another embodiment, an electronic device includes a package having one or more programmable elements. The first end of one programmable element is coupled to a power supply node in the package. At least one integrated circuit die is mounted in the package. The second end of the programmable element may couple to an external package connection (e.g. a package pin) and/or to an internal package node that connects to an input terminal of the integrated circuit die.
Still another embodiment provides a method for setting a parameter value for an integrated circuit. The method includes selectively programming one or more programmable elements located on an integrated circuit package, to selectively couple an internal package node to a supply voltage node. The one or more programmable elements are selectively programmed according to a desired value of an integrated circuit parameter. The parameter may, e.g., be a voltage or speed rating. The internal package node is coupled to either a package pin, an input terminal of the integrated circuit or both.
In still another embodiment a method is provided that includes selectively programming at least one fuse of a fuse pair located on an integrated circuit package to selectively couple an internal node to either a first power supply voltage or a second power supply voltage. The internal node is coupled to a package pin or to an input terminal of the integrated circuit die mounted in the integrated circuit package, or to both.
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Boothby Hugh William
Casto James John
Qureshi Qadeer Ahmad
Advanced Micro Devices , Inc.
Lee Eugene
Thomas Tom
Zagorin O'Brien & Graham LLP
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