Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2002-09-24
2004-04-20
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S435000, C438S444000
Reexamination Certificate
active
06723616
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to the field of semiconductor devices and, more specifically, to a process for increasing screen dielectric thickness without significantly affecting shallow trench isolation corner protection.
BACKGROUND OF THE INVENTION
Screen dielectric layers used in semiconductor devices can protect the substrate of a semiconductor device during formation of active areas. As semiconductor devices continue to be scaled smaller, the thickness of the sacrificial screen dielectric layer used to protect the semiconductor substrate during formation of active areas likewise tends to decrease. Thinning the sacrificial screen dielectric layer often leads to a reduction in gate oxide integrity (GOI) and reliability of the semiconductor device. Consequently, as semiconductor geometry shrinks, screen dielectric layers, formed through the traditional shallow trench isolation process can fall short of providing adequate protection to the semiconductor substrate.
SUMMARY OF THE INVENTION
The present invention recognizes a need for a method of forming a semiconductor device while maintaining a minimum screen dielectric thickness even as scaling decreases the size of the device. In accordance with the present invention, a method of forming a semiconductor device utilizing a minimum screen dielectric thickness is provided that substantially reduces or eliminates at least some of the shortcomings associated with prior approaches.
In one aspect of the invention, a method of forming a semiconductor device using shallow trench isolation comprises forming a trench within a semiconductor substrate and forming a screen dielectric stack outwardly from the semiconductor substrate. The screen dielectric stack comprises a first sacrificial dielectric layer disposed outwardly from the semiconductor substrate and a second sacrificial dielectric layer disposed outwardly from and in contact with the first sacrificial dielectric layer. In one particular embodiment, the first sacrificial dielectric layer is formed before forming the trench and the second sacrificial dielectric layer is formed after forming the trench.
In another aspect of the invention, a method of forming a semiconductor device using shallow trench isolation comprises forming a dielectric stack outwardly from a semiconductor substrate, the dielectric stack comprising a first sacrificial dielectric layer disposed outwardly from the semiconductor substrate and a second sacrificial dielectric layer disposed outwardly from the first sacrificial dielectric layer. The method further comprises removing a portion of the first sacrificial dielectric layer, a portion of the second sacrificial dielectric layer, and a portion of the substrate to form a trench within the semiconductor substrate and the dielectric stack. The method further comprises forming an isolation dielectric region within the trench, removing the second sacrificial dielectric layer, and after removing the second sacrificial dielectric layer, forming a third sacrificial dielectric layer outwardly from the first sacrificial dielectric layer.
In another aspect of the invention, a semiconductor device results from a process comprising forming a dielectric stack outwardly from a semiconductor substrate, where the dielectric stack comprises a first sacrificial dielectric layer disposed outwardly from the semiconductor substrate and a second sacrificial dielectric layer disposed outwardly from the first sacrificial dielectric layer. The process further comprises removing a portion of the first sacrificial dielectric layer, a portion of the second sacrificial dielectric layer, and a portion of the substrate to form a trench within the semiconductor substrate and the dielectric stack. The process also comprises forming an isolation dielectric region within the trench, removing the second sacrificial dielectric layer, and after removing the second sacrificial dielectric layer, forming a third sacrificial dielectric layer outwardly from the first sacrificial dielectric layer.
In at least some embodiments of the invention, a non-sequentially formed screen dielectric stack substantially prevents implant channeling into the semiconductor substrate during the subsequent formation of an active region in the semiconductor substrate even as devices are scaled to very small sizes. In one particular embodiment of the invention, the screen dielectric stack comprises a combined thickness of at least 100 Angstroms.
Depending on the specific features implemented, particular embodiments of the present invention may exhibit some, none, or all of the following technical advantages. Various aspects of the invention can reduce or prevent implant channeling into the semiconductor substrate during the subsequent formation of an active region even where device scaling would otherwise reduce the thickness of a conventional screen dielectric layer. Various embodiments of the present invention increase the screen dielectric layer thickness without significantly affecting the size of the active area in the semiconductor device.
Other technical advantages will be readily apparent to one skilled in the art from the following figures, descriptions and claims. Moreover, while specific advantages have been enumerated above, various embodiments may include all, some or none of the enumerated advantages.
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patent: 6472292 (2002-10-01), Konishi
Kim Young-min
Rodder Mark S.
Sridhar Seetharaman
Wu Zhiqiang
Brady III W. James
Malsawma Lex H.
McLarty Peter K.
Smith Matthew
Telecky , Jr. Frederick J.
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