High-speed bit-pattern detector

Details High-speed bit-pattern detector High-speed bit-pattern detector

2000-08-21

2004-09-14

Tran, Khai (Department: 2631)

Pulse or digital communications

Synchronizers

Frequency or phase control using synchronizing signal

Reexamination Certificate

active

06792061

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to digital electronics and more particularly to methods and associated circuits for detecting bit patterns.
2. Description of the Related Art
A bit stream consists of serially transmitted digital data bits. A specific sequence of bits, also known as a bit pattern, has special significance in some bit streams. For example, a bit pattern “10101010” can indicate that the next following bits in the bit stream constitute a distinct block of information.
Detecting bit patterns in a high-speed bit stream is specially challenging because pattern detection needs to be performed while the bit stream passes at a high rate. Thus, the pattern detector must be fast enough to keep up with the high speed bit stream, which can have rates of 1 Gbit/s (1 Giga bit per second) and higher.
From the foregoing, a method and associated circuits for detecting bit patterns in a high-speed bit stream is highly desirable.
SUMMARY
A first single-bit detector reads a first bit of a serial bit stream and compares it to a first bit of a pattern. If the first bit of the bit stream and the first bit of the pattern have the same logical value, a second single-bit detector is enabled to read a second bit of the bit stream. The second single-bit detector then reads the second bit of the bit stream and compares it to a second bit of the pattern. N single-bit detectors are employed to detect an N-bit pattern. The aforementioned reading and comparison actions continue until all bits of the pattern are detected. By performing the comparison as each bit of the bit stream arrives at a node, the present single-bit detectors can be used in a pattern detector to detect bit patterns in high-speed bit streams.
In one embodiment, the first single bit detector and the second single bit detector are synchronized using different portions of a clock signal to lower the clock frequency requirement of the pattern detector.
These and other features of the present invention will be apparent to a person of ordinary skill in the art upon reading the following description and figures.


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