VLSI architecture, in particular for motion estimation...

Details VLSI architecture, in particular for motion estimation... VLSI architecture, in particular for motion estimation...

2001-09-06

2004-04-20

Kelley, Chris (Department: 2613)

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

C375S240260

Reexamination Certificate

active

06724823

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention refers to VLSI architectures and, more particularly, to VLSI architectures for real time and low complexity procedures for motion estimation.
2. Description of the Related Art
Motion estimation is a key issue in video coding techniques (for example H.263/MPEG) or image filtering. In particular, algorithms based on predictive spatio-temporal techniques achieve high coding quality with the use of a reasonable computational power by exploiting the spatio-temporal correlation of the video motion field.
Especially in the last decade, multimedia communication techniques have experienced rapid growth and great market success for several applications, including videotelephony, videoconference, distance working and learning, tele-medicine, home or kiosk banking, to name but a few. This trend is becoming increasingly marked with the most recent information and communication technologies based on VDSL, ADSL and ISDN lines, also for residential use, and in third generation personal communication systems (IMT-2000). In this scenario, compression of the video signal aimed at reducing the noteworthy quantities of data and transmission frequency required to store and transmit signals, plays a fundamental role. Hence several compression standards, such as H.261, H263 and MPEG (versions 1, 2, 4) were developed, especially by ISO and ITU-T.
In this respect the following papers/works may be usefully referred to:
MPEG2, “Generic Coding of Moving Pictures and Associated Audio”, ISO/IEC 13818-2, March 1994;
Telecommunication standardization sector of ITU, “Video Coding for Low Bit rate Communication”, Draft 21 ITU-T, Recommendation H.263 Version 2, January 1998;
F. Kossentini et al., “Towards MPEG-4: an Improved H.263 Based Video Coder”, Signal Processing: Image Communic, Special Journal, Issue on MPEG-4, vol. 10. pp. 143-148, July 1997.
The relevant codecs call for very powerful hardware architecture. In that respect the use of DSP techniques and advanced VLSI technology is of paramount importance to meet the requirements of low-cost and real time, which are almost mandatory to obtain truly satisfying results on the market.
In this respect, to reduce both time-to-market and the design costs typical of VLSI technology, design reuse methodologies are used extensively. This solution requires the development of VLSI IP (Intellectual Property) cells that are configurable, parametric and synthesizable and thus adapted to be reused in a wide range of applications. In particular, the design of high performance ASIC structures is required for Motion Estimation (ME) applications, which are the most complex part of ISO/ITU-T codecs.
Movement Estimation (ME) systems exploit the temporal correlation between adjacent frames in a video sequence to reduce the data interframe redundancy.
In this regard, works such as:
P. Pirsch et al. “VLSI architectures for video compression, A Survey”, Proc. of IEEE, vol. 83, n. 2, pp. 220-246, February 1995;
Uramoto et al. “A Half Pel Precision Motion Estimation Processor for NTSC Resolution Video”, Proc. IEEE Custom Integ. Circ. Conf., 1993;
Tokuno et al. “A motion Video Compression LSI with Distributed Arithmetic Architecture”, Proc. IEEE Custom Integ. Circ. Conf., 1993;
H. Nam and M. K. Lee, “High Throughput BM VLSI Architecture with low Memory Bandwidth”, IEEE Trans. on Circ. And Syst., vol. 45, n. 4, pp. 508-512, April 1998;
L. Fanucci, L. Bertini, S. Saponara et al. “High Throughput, Low Complexity, Parametrizable VLSI Architecture for FS-BM Algorithm for Advance Multimedia Applications”, Proc. of the ICECS '99, vol. 3, pp. 1479-1482, September 1999,
describe solutions based on the technique currently named Full Search Block-Matching or, in short, FS-BM.
In this technique the current frame of a video sequence is divided into N×N blocks (reference block) and, for each of them, an N×N block in the previous frame (candidate block), addressed by a motion vector (MV), is exhaustively searched for the best matching within a search area range of (2p
h
+N)×(2p
v
+N) according to a determined cost function.
This technique achieves a high coding quality at the expense of high computational load and hence it limits a practical real time and low power/cost implementation of the movement estimation.
For example, for typical image formats such as CIF (352*288 pixels) at 30 frames/s, N=16, p
h
=p
v
=16, adopting the Sum of Absolute Difference (SAD) cost function, 3×10
9
absolute difference (AD) operations per second are required.
The SAD is defined by the formula:
SAD
(
m,n
)=&Sgr;&Sgr;|
a
(
i,j,T
)−
a
(
i+n,j+m,T−
1)|
where the two sums are extended to all i and j values from 0 to N−1, while a (i, j, T) represents the intensity of a generic pixel of the reference block while a (i+n, j+m, T−1) represents the intensity of the corresponding pixel in the candidate block, shifted by a motion vector of coordinates (m, n).
To reduce this computational load while maintaining the same coding quality, several fast motion estimation algorithms were proposed in the literature.
In this regard, in addition to the aforesaid work by F. Kossentini et al., useful reference may be made to the following works:
M. Ghanbari “The Cross Search Algorithm for Motion Estimation”, IEEE Trans. Communic., Vol. 38, pp. 950-953, July 1990;
C. -C. J. Kuo et al., “Fast Motion Vector Estimation Using Multiresolution Spatio-Temporal Correlations”, IEEE Trans. on Circ. and Syst. for Video Technology, Vol. 7, No. 3 pp. 477-488, June 1997;
A. Ortega et al., “A Novel Computationally Scalable Algorithm for Motion Estimation”, VCIP'98, January 1998;
F. Kossentini, R. K. Ward et al., “Predictive RD Optimized Motion Estimation for Very Low Bit-Rate Video Coding”, IEEE Journal on Selected Areas in Communications, Vol. 15, No. 9, pp. 1752-1763, December 1997,
and to European patent application 00830332.3.
Other relevant papers are: EP97830605.8, EP98830163.6, EP98830484.6, E097830591.0, EP98830689.0, EP98830484.6, EP98830600.7, EP99830751.6.
Other relevant publications are:
F. Rovati, D. Pau, E. Piccinelli, L. Pezzoni, J-M. Bard “An innovative, high quality and search window independent motion estimation algorithm and architecture for MPEG-2 encoding” IEEE 2000 international conference on consumer electronics.
F. Scalise, A. Zuccaro, A. Cremonesi “Motion estimation on very high speed signals. A flexible and cascadable block matching processor”, international workshop on HDTV, Turin 1994.
F. Scalise, A. Zuccaro, M. G. Podesta, A Cremonesi, G. G. Rizzotto “PMEP: a single chip user-configurable motion estimator processor for block-matching techniques” 135th SMTPE technical conference.
A. Artieri, F. Jutland “A versatile and Powerful chip for real time motion estimation”, ICASSP 1989.
STMicroelectronics “ST13220 motion estimation processor” datasheet, July 1990.
Many of the solutions described in the aforesaid works, based on predictive spatio-temporal algorithms, achieve very good performance in terms of reduced computational load and high coding quality by exploiting the spatial and temporal correlation of the motion vectors field.
In a video sequence, particularly in low bit rate applications, the motion field usually varies slowly with a high correlation along both horizontal and vertical directions: in this regard, see the work mentioned above by C. -C. J. Kuo et al.
By exploiting this correlation, the motion vector of a given block can be predicted from a set of initial candidate motion vectors (MVS) selected from its spatio-temporal neighbors, according to a certain law.
This first step is called predictive phase.
To further reduce the residual error of estimation a refinement process is performed using the predicted motion vector as the starting point.
This second step is called refinement phase.
Several of the works mentioned above are based on this approach. These differ from each other both in the predictive phase (MVS s

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