Heat transfer structure for a semiconductor device utilizing...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

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C257S713000, C257S717000, C257S720000, C257S783000, C438S122000, C361S709000, C361S711000

Reexamination Certificate

active

06768193

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device suitable for power circuits, such as inverters which are used in various power electronics apparatuses.
DESCRIPTION OF THE RELATED ART
As a typical prior art structure of substrates insulated with a glass for use in semiconductor devices, Japanese Patent No. 2503778 discloses a substrate for semiconductor devices has a structure comprising a heat sink plate of copper or a copper alloy and a thin plate for forming circuits of copper or a copper alloy where the thin plate is laminated on one surface of the heat sink plate with an oxide-based glass insulating layer having a thermal expansion coefficient close to those of copper or the copper alloy interposed between the heat sink and the thin plate. The oxide-based glass insulating layer comprises a silicate glass or phosphate glass.
On the other hand, JP-A-9-97865 discloses a structure comprising a SiN substrate having a heat sink of Cu or Al adhered thereon with an active metal solder. JP-A-2-94649 discloses a structure comprising a Al
2
O
3
substrate having a heat sink of Cu and Cu
2
O layer adhered thereon with a solder layer. JP-A-2000-97865 discloses an arrangement comprising a glass substrate having a base plate adhered thereon with a die paste.
The conventional structures having the oxide-based glass insulating layer as described above are as thick as 1 mm due to the glass formed on the upper concave surface of the heat sink plate. The thermal conductivity of glass is as low as 0.5 to 3 W/m.k. As the thickness of the glass is thicker, the thermal resistance of the glass part becomes higher. Therefore, the thermal resistance from the circuit-forming thin plate to the heat sink plate becomes higher. When loading a semiconductor device having a higher exothermic value, a larger heat sink is required for cooling which causes problems of an increase in the heat sink volume and added costs. Moreover, there is a problem that the structure is brittle under a stress due to the thick glass.
Another problem is that the glasses used for the conventional structure contain alkaline materials such as Na
2
O and P
2
O
5
resulting in a reduction in glass's electric resistance associated with a reduction in breakdown voltage. Moreover, alkaline glasses have a lower chemical stability as compared to those of SiO
2
glasses and hence they are lower in reliability. An additional problem is that as they have a high melting point as high as 700° C. which is corresponding to a working temperature for adhering the glasses onto a metal, they can not be adhered to a material having a relatively low melting point, such as aluminum (660° C.). Besides those problems, there is still another problem that a reducing atmosphere is necessary for combining the glass with copper or a copper alloy because both can not be conjugated in an oxidizing atmosphere.
A structure adhered with active metal solder materials as disclosed in JP-A-97865 and that having connections formed via solder layers as disclosed in JP-A-2-94649 have both a higher heat resistance and hence require a larger heat sink for cooling when a semiconductor device having a high exothermic value is loaded, producing problems such as an increase in the heat sink volume and added costs.
Moreover, the invention of the above JP-A-2000-97865 effected an adhesion between a base plate and a SiO
2
glass substrate. However, the SiO
2
glasses have a high heat resistance and therefore requires a larger heat sink for cooling when loading very exothermic semiconductor devices.
In view of the above problems, an object of the present invention is to achieve a semiconductor apparatus which allows chip area to be made smaller using a highly effective power module for cooling.
Other objects, features and advantages of the invention will become apparent from the following description of the embodiments of the invention taken in conjunction with the accompanying drawings.
SUMMARY OF THE INVENTION
In order to overcome the problems of conventional structures as described above, the present invention is to provide a heat transfer structure for use in semiconductor apparatuses where the semiconductor devices are joined through an electric insulating material with a metallic heat sink means, characterized in that a bismuth glass layer is used as said electric insulating material.
Another aspect of the present invention is a heat transfer structure for use in semiconductor apparatuses where the semiconductor devices are joined through an electric insulating material with a metallic heat sink means, characterized in that as said electric insulating materials, a bismuth glass layer is used, and an intermediate layer comprising a metal or metal product or a combination of said metal and said metal product is interposed between said metallic means and said bismuth glass layer so that said intermediate layer is conjugated with said bismuth glass layer.
Still another aspect of the present invention is a semiconductor apparatus where at least one of semiconductor devices is conjugated through an electric insulating material with a metallic heat sink means, characterized in that as said electric insulating material, a bismuth glass layer is used, and an intermediate layer comprising a metal or metal product or a combination of said metal and said metal product is interposed between said metallic means and said bismuth glass layer so that said intermediate layer is conjugated with said bismuth glass layer.
Still another aspect of the present invention is that a semiconductor apparatus comprising a primary circuit section having semiconductor devices and the first metal material loaded with said semiconductor devices, a control circuit section for transferring control signals to said primary circuit section, external input-output terminals to be connected to said primary circuit section and said control circuit section, and the second metal material for transferring the heat generated from said semiconductor devices into the ambient environment, where an electric insulating material is interposed between said first metal material or said external input-output terminals and said second metal material, characterized in that as said electric insulating material, a bismuth glass layer is used, and an intermediate layer comprising a metal or metal product or a combination of said metal and said metal product is interposed between said first metal material or said external input-output terminals and said bismuth glass layer or between said second metal material and said bismuth glass layer so that said intermediate layer is conjugated with said bismuth glass layer.
According to the present invention, when the interconnection means are bonded to the heat sink with a low melting bismuth glass, an intermediate layer comprising a metal or metal product should be interposed between the glass and the metal material, whereby improvement of both thermal properties and reliability can be achieved while retaining a high breakdown voltage. That is, the use of the bismuth glass which may be made very thin allows the heat resistance of the insulating material to reduce and hence the overall heat resistance from the semiconductor devices to the ambient circumstances to reduce. As a result, a current density of the semiconductor devices may be raised, thereby realizing a reduction in the area of the semiconductor devices. Moreover, providing the intermediate layer is advantageous in that it can eliminate the requirement of effecting the bonding in a reducing atmosphere.


REFERENCES:
patent: 5157014 (1992-10-01), Shi
patent: 5182632 (1993-01-01), Bechtel et al.
patent: 5256469 (1993-10-01), Cherukuri et al.
patent: 5277724 (1994-01-01), Prabhu
patent: 6291880 (2001-09-01), Ogawa et al.
patent: 6479323 (2002-11-01), Lo et al.
patent: 6486548 (2002-11-01), Nakatsu et al.
patent: 2109997 (1983-06-01), None
patent: 2-094649 (1990-04-01), None
patent: 2-100346 (1990-04-01), None
patent: 02100346 (1990-04-01), None

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