Computer graphics processing and selective visual display system – Computer graphic processing system – Integrated circuit
Reexamination Certificate
2002-02-11
2004-09-21
Tung, Kee M. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphic processing system
Integrated circuit
Reexamination Certificate
active
06795077
ABSTRACT:
The present invention relates to an integrated circuit for processing sets of data, said sets of data comprising pixels. The invention also relates to a method of processing sets of data, adapted to said circuit. The invention is particularly applicable in the field of digital television.
U.S. Pat. No. 5,883,670 describes an integrated circuit for processing images in a video processor. The circuit is connected to a computer. A volatile memory, for example, a SDRAM of the order of several megabytes is associated with this computer. The circuit comprises image decoding means. Image sequences which arrive through a video channel are saved and processed in the memory as the images are decoded. A standard bus of the PG type is used for the circuit to access said memory.
In said field of digital television, sets of data such as graphic patterns (icons, characters, etc.) are often used and superimposed on images. For example, characters are used during a visual on-screen translation of a film into a foreign language. For processing an image with such patterns, the following steps are carried out:
saving the sequences of encoded images from the video channel and patterns in the SDRAM memory,
processing a sequence of images:
reading a sequence of images in the SDRAM volatile memory,
decoding the sequence of images,
writing the sequence of images thus decoded into the SDRAM memory,
reading the sequence of images in order to perform a step of correcting errors which are inherent in encoding images by means of a dedicated co-processor (correction currently referred to as post-processing),
rewriting of the improved image into the SDRAM memory,
processing of patterns:
reading patterns in the SDRAM volatile memory,
processing patterns by means of a dedicated graphic co-processor,
rewriting patterns into the SDRAM memory,
reading, by the video processor, the sequence of images and patterns thus processed,
composition, by said processor, of the image to be displayed with said sequence and said patterns,
display of the image composed by a video output co-processor.
A decoded sequence of images occupies 20 Mbytes per second (a byte comprises 8 bits) in the normal definition and 124 Mbytes in the high definition, in accordance with one of the possibilities of the ATSC standard (Advanced Television Standards Committee). Consequently, for generating a sequence of images as described hereinbefore, there is more than 100 Mbytes/s=(2+2+1)*20 of passband required for images in the normal definition and more than 620 Mbytes/s=(2+2+1)*124 of passband for images in the high definition (two reading operations, two writing operations for decoding and improvement, one reading operation for the composition) without counting the processing of different patterns. If the system described above is used for processing an image with patterns, there is a risk of numerous times of access to the SDRAM memory, an overload at the level of the data bus and consequently a considerable cluttering of the passband.
A technical problem to be solved by the object of the present invention is to propose an integrated circuit for processing sets of data in an image, said sets of data comprising pixels, as well as an associated method, particularly allowing a reduction of the access time to the memory and reducing cluttering of the passband.
In accordance with a first object of the present invention, a solution to the technical problem posed is characterized in that the integrated circuit comprises:
an only memory suitable for saving at least a set of data comprising a number of pixels having a size varying from one type of set to another,
means for controlling pixels, suitable for giving an indication of the type of a set of data,
means for extracting pixels, suitable for selecting and reading said set of data, extracting at least a pixel of said set of data at the output of said memory as a function of said indication, and dispatching said at least one pixel to encoding means.
In accordance with a second object of the present invention, this solution is characterized in that the method of processing sets of data comprises the steps of:
saving in an only memory at least a set of data comprising a number of pixels having a size varying from one type of set to another,
giving an indication of the type of a set of data,
selecting and reading said set of data,
extracting at least a pixel of said set of data at the output of said memory as a function of said indication,
dispatching said at least one pixel to encoding means.
As we will see in details hereinafter, said sets of data are processed in real time by virtue of the means for controlling and extracting the pixels and encoding, by performing the reading operations of the sets of data in the memory of the integrated circuit without having to use an external memory. The access to the memory are thus reduced and, consequently, the passband is less cluttered up.
These and other aspects of the invention are apparent from and will be elucidated, by way of non-limitative example, with reference to the embodiment(s) described hereinafter.
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Koninklijke Philips Electronics , N.V.
Tung Kee M.
Ure Michael J.
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