Universal clock generator

Details Universal clock generator Universal clock generator

2001-11-27

2004-09-14

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S158000, C327S162000

Reexamination Certificate

active

06791380

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a clock generator, particularly to a universal clock generator suitable to be placed on every motherboard.
2. Description of Related Art
For the demands of different chipsets and personal computers, it is necessary to modify the structure of a clock generator. The output structure of a known clock generator
11
is shown in FIG.
1
(
a
), which outputs clocks with all possible frequencies to all components (such as chipset
12
and DRAM module
13
) on the motherboard. The output structure of another known clock generator
11
is shown in FIG.
1
(
b
), which outputs a clock frequency to the chipset
12
. After that, the chipset
12
outputs a reference frequency to a DRAM buffer
13
, which further expands the number of clocks output to the DRAM module
13
. Comparing to FIG.
1
(
a
), it is more convenient to control the output of the DRAM frequency using the structure in FIG.
1
(
b
). The output structure of a known clock generator
11
is shown in FIG.
1
(
c
), which combines the DRAM buffer
14
and clock generator
11
in FIG.
1
(
b
) into a single IC.
If the clock generator
11
is classified in accordance with the number of output clocks, it may be classified into a high frequency clock region
21
and a low frequency clock region
22
, as shown in FIG.
2
. The low frequency clock region
22
outputs fixed frequency clocks in general, such as 48/24 MHz, 14.318 MHz and the clock of an SM bus. Relatively, the design of a CPU clock, SDRAM clock, PCI clock and AGP clock in the high frequency clock region
21
always have to be modified according to the demand of the number of different clocks and the design of objects to which the clocks connect (such as a design of push and pull or open drain).
In other words, since the known clock generator
11
has to integrate different clock demands of different components on the motherboard, it will raise the manufacturing cost and lower down product compatibility due to a continuing modification. In order to solve with the above problem, the present invention proposes a novelty universal clock generator to overcome it.
SUMMARY OF THE INVENTION
The main object of the present invention is to provide a universal clock generator suitable to the demand of providing a large amount of different clock pins on a motherboard.
The second object of the present invention is to provide a universal clock generator so as to reduce the design and testing cost for motherboard and clock generator manufacturers.
To obtain the above purpose, the clock generator of the present invention comprises a high frequency clock region for generating high frequency clocks and a low frequency clock region for generating high frequency clocks. The low frequency clock region includes at least one delay lock loop for increasing the number of high frequency clocks of the high frequency clock region. When the number of the high frequency clocks (such as CPU clock, SDRAM clock, AGP clock and PCI clock) is not high enough, the delay lock loop of the low frequency clock region can be cascaded to support insufficient clocks. Besides, the output clocks of the delay lock loop can support a buffering function, and some clocks having a high variability (such as a CPU clock) can be set up as a push-pull, open-collector or differential output by a power-on setting pin for increasing the application.


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