Printed wiring board with plurality of interconnect patterns...

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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Details

C029S829000, C029S831000, C029S844000, C174S255000, C174S265000, C156S295000, C156S298000, C438S115000, C438S622000

Reexamination Certificate

active

06705003

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a printed wiring board and a manufacturing method thereof, more specifically to a printed wiring board what is called a multi-layered substrate in which a plurality of interconnection patterns are disposed in multi-stages through a plurality of insulating substrates and between the respective interconnection patterns electrical communication is established and a manufacturing method thereof.
2. Description of the Related Art
As a manufacturing method of a multi-layered substrate, there is known a method in which a wedge type conductor bump is pressure-fitted in a thickness direction of a substrate to interconnect between layers thereof.
FIG. 16
is a vertical sectional view of a substrate unit of an existing multi-layered substrate.
As shown in
FIG. 16
, in the existing method, on a copper foil
101
a plurality of conductor bumps
102
,
102
, . . . constituted of silver paste are formed by the use of printing technology or the like (FIG.
16
A). On tip end sides thereof
102
,
102
, uncured insulating material, namely prepreg
103
, is overlapped, followed by pressing to cause the conductor bumps
102
,
102
, . . . to penetrate through the prepreg
103
(FIG.
16
B). Thereafter, one what is called core material
104
where on both surfaces of an insulating substrate, interconnection patterns are formed is stacked together with the above prepregs with the conductor bumps (FIG.
16
C). The stacked body is pressed under heating so that the tip ends of the conductor bumps
102
,
102
, . . . are pressed against the interconnection patterns on surfaces of the core material
104
to bring into contact, thereby forming inter-layer connection (FIG.
16
D).
In the above method, in a thickness direction of the prepreg
103
, the conductor bumps
102
,
102
, . . . are pressure-fitted to penetrate through the prepreg. As a result, on the tip ends of the conductor bump
102
,
102
, . . . large pressing force is exerted. Accordingly, the conductor bumps
102
,
102
, . . . , so as to stand the pressing force, are necessary to be large in degree of thickness and magnitude to some extent.
SUMMARY OF THE INVENTION
Electronic equipment such as portable telephones and personal computers have been downsized year by year. As a result, a multi-layered substrate used therein is also demanded to downsize. Accordingly, integration degree of the multi-layered substrate is necessary to be improved furthermore. Resultantly, the conductor bump is also necessary to be miniaturized.
However, the miniaturization of the conductor bump causes lowering of mechanical strength against the pressing force. As a result, there are problems that the conductor bump, when press-fitting in the prepreg, is deformed to lower reliability of interlayer connection.
Furthermore, when a diameter of the conductor bump is made smaller, areas of tip end and lower surfaces become smaller. As a result, contact areas between the above surfaces and interconnection patterns decrease to result in lowering of reliability of interlayer connection.
For instance, when forming a conductor bump of which lower surface diameter is 0.1 mm, as shown at the left end of
FIG. 16B
, a bump height of 0.12 mm is necessary. However, according to the existing printing technology, there is a limit in height accuracy of the conductor bump that can be formed, resulting in dispersion of the conductor bump height. When the height of the conductor bump is 0.9 mm as shown at the right end of
FIG. 16B
, resin in the prepreg
103
covers a head of the conductor bump. Accordingly, the conductor bump could not penetrate through the prepreg
103
of a thickness of 0.06 mm, resulting in inability to form the interlayer connection.
Furthermore, due to the strong pressing force exerting during press-fitting the conductor bump into the prepreg, strain is formed in the prepreg to affect adversely on the characteristics of the printed wiring board.
The present invention is made to overcome these existing problems. That is, an object of the present invention is to provide a printed wiring board of which reliability of the interlayer connection is high even after a conductor bump is miniaturized, and a manufacturing method of such printed wiring board.


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Kenji Sasaoka et al., U.S. Ser. No. 09/093,605, “Apparatus for Manufacturing a Wiring Board and Method for Manufacturing a Wiring Board”, filed Jun. 9, 1998.
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Akira Ogawa et al., U.S. Ser. No. 09/355,438, “Method and Apparatus for Manufacturing Multi-Layered Wiring Board and Multi-Layered Wiring Board”, filed Jul. 28, 1999.

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