Data processing: generic control systems or specific application – Generic control system – apparatus or process – Plural processors
Reexamination Certificate
2000-06-28
2003-12-09
Patel, Ramesh (Department: 2121)
Data processing: generic control systems or specific application
Generic control system, apparatus or process
Plural processors
C700S005000, C700S003000, C700S004000, C700S019000, C709S241000, C709S241000, C709S241000, C709S200000, C709S225000, C370S229000, C370S231000, C370S232000, C370S236000, C370S400000
Reexamination Certificate
active
06662057
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates both to a computer system and a method for controlling processes on such computer system which is configured particularly for the parallel execution of several processes using a scarce resource.
In a computer system as described the problem frequently arises above that a blocking of a scarce resource occurs when the several processes that access the resource exhaust its capacity. Such blockings lead to an unstable system state which, in turn can necessitate frequent undesirable restarting measures.
To solve this problem, it is possible to expand the scarce resource. But the same problem then occurs with another resource of the computer system, which is then scarce. Another known solution is to delay all processes accessing the resource in a constant manner. However, this leads to a delay of process execution and can prevent a blocking of the scarce resource only up to a certain elevated maximum load.
In addition, European patent EP-A-0-794 490 teaches a multitasking system, or the communication in a computer network in accordance with a client/server model, in which several clients can access one server. There, the access to the server is controlled via the number of threads specified by the client. When a certain number is exceeded, either a connection is not set up, or the client must wait until a thread is permitted.
It is therefore an object of the present invention to configure this type of computer system, and a method for controlling processes on the computer system, by which it is possible to prevent a blocking of the scarce resource.
SUMMARY OF THE INVENTION
This object is inventively achieved by a computer system, and method for controlling the same, having a first device for computing the capacity load C of the resource, a second device for determining a load responsibility of a process that accesses the resource, and a third device for delaying the execution of the process that accesses the resource depending on each of the capacity load C, the critical capacity load C
crit
of the resource, and the load responsibility LR of the process.
The inventive device and the inventive method function adaptively; that is, depending on the current usage level of the resource and on the load responsibility of a process, so that other processes that only slightly load the resource can continue to run unaffected. It can, thus, be guaranteed that processes that are necessary for the stability of the system continue to run despite heavy loading of the resource. On the basis of the specific delaying of each individual process dependent on each of the current capacity load, the critical capacity load and the load responsibility of the respective process, the user of the computer system can implement desirable marginal conditions. For example, individual processes with higher priority can be delayed only shortly or not at all, despite an overcritical load. The delay of a process can increase with the respective load responsibility of the process. Processes whose load responsibility is below a limit value can remain completely unaffected by the delay. When the load of the scarce resource lies below a critical load, all processes can be executed without delay.
The load responsibility LR can be defined either as the number of accesses of the scarce resource that are required in the execution of a process, as the resource capacity demanded by the process, or as a combination of both.
The critical capacity load C
crit
of the resource can be selected according to the type, task, and stability of the resource. The critical capacity load C
crit
advantageously lies between 20% and 80% of the maximum capacity C
max
; in particular, at approximately 50% of the maximum capacity.
A process whose load responsibility LR lies below a defined value advantageously is not delayed. In this way, processes that make little or no contribution to the critical load can continue to run without a delay.
When the actual instantaneous capacity load C of the resource lies below the critical capacity load C
crit
, all processes are executed without delay. The computer system can thus function at maximum speed when a critical load is not present.
The delay can be varied between a minimum and maximum delay time, wherein it is possible to select the minimum and maximum values according to the characteristics and requirements placed on the resource.
REFERENCES:
patent: 5522070 (1996-05-01), Sumimoto
patent: 5991808 (1999-11-01), Broder et al.
patent: 6067545 (2000-05-01), Wolff
patent: 6125397 (2000-09-01), Yoshimura et al.
patent: 6128279 (2000-10-01), O'Neil et al.
patent: 6256726 (2001-07-01), Hotta et al.
patent: 6275867 (2001-08-01), Bendert et al.
patent: 6363453 (2002-03-01), Esposito et al.
patent: 6389446 (2002-05-01), Torii
Bauer Stefan
Haas Ulrich
Niessner Egon
Simsch Birgit
Bell Boyd & Lloyd LLC
Patel Ramesh
Siemens Aktiengesellschaft
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