Registers – Records – Conductive
Reexamination Certificate
2001-10-12
2003-02-25
Pitts, Harold I. (Department: 2876)
Registers
Records
Conductive
C235S436000
Reexamination Certificate
active
06523755
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a memory system used in a small-size data terminal such as a portable telephone.
2. Description of the Related Art
In general, a memory system used in a small-size data terminal such as a portable telephone comprises a linear flash memory for storing instruction codes of a CPU and various data and an SRAM for temporarily storing data to be used as a work area of the CPU. In particular, in the portable telephone of which a area for mounting circuits is severely limited, an MCP (Multi Chip Package) in which the linear flash memory and the SRAM are incorporated in one package is employed.
With an increase of the number of functions of the data terminal and an increase in speed of a communication service in recent years, increases in capacity of the linear flash memory and the SRAM are eagerly required, and the memory capacities of the linear flash memory and the SRAM serving as single elements become short. A storage flash memory of AND/NAND which is a block (sector) access type suitable for a large-capacity storage application is manufactured as the flash memory. However, since these flash memories can hardly be connected to a CPU bus because of the characteristics of the flash memories, there are problems in which a dedicated interface circuit must be additionally connected, or only low-speed access by port connection to a CPU can be achieved. In addition, these storage flash memories can be only accessed in units of blocks, and cannot be randomly accessed. Therefore data is transferred onto another RAM, and the CPU should access the data stored in the RAM. For this reason, a large-capacity RAM is required disadvantageously.
For an increase in capacity of the RAM, a pseudo-SRAM which employs a one-transistor dynamic memory cell as well as a DRAM, and has the same interface specifications as those of an SRAM may be used. Although the pseudo-SRAM can increase the capacity, the problem of a shortage of capacity of a flash memory still remains.
SUMMARY OF THE INVENTION
The present invention provides a semiconductor memory device in place of an SRAM in the conventional memory system to solve the above problems, and has as its object to provide easily a large-capacity memory system for a small-size information terminal at low cost, by incorporating the interface circuit of the storage flash memory or a control function in the semiconductor memory device and giving the same configuration as that of a DRAM to the memory cell.
A first semiconductor memory device according to the invention receives commands from a CPU to read or write data. The semiconductor memory device is connected to an external nonvolatile memory for reading or writing data in a unit (access unit) of predetermined amount of data to be accessed. The memory device comprises an interface circuit for generating control signals required for data access to the nonvolatile memory in synchronism with the commands from the CPU, and a memory element which can be randomly accessed. Data are read or written from or to either the nonvolatile memory or the memory element in accordance with the commands from the CPU.
Since the first semiconductor memory device according to the present invention incorporates an interface circuit for generating a control signal required for data access to a nonvolatile memory connected to an external circuit, another interface circuit for the nonvolatile memory need not be arranged in a memory system constituted by a random access memory and a nonvolatile memory, and a compact and large-capacity memory system can be realized.
A second semiconductor memory device according to the invention receives commands from a CPU to read or write data. The semiconductor memory device is connected to an external nonvolatile memory for reading or writing data in a unit (access unit) of predetermined amount of data to be accessed. The semiconductor memory device comprise a memory control circuit for generating timing signals and control signals required for data access to the nonvolatile memory in asynchronism with the commands from the CPU, and a memory element which can be randomly accessed. Data are read or written from or to either of the nonvolatile memory or the memory element in accordance with the commands from the CPU.
Thus, when an external CPU simply transmits only address data and an operation command of a transfer source or a transfer destination to the semiconductor memory device in a normal memory cycle, data transfer between the semiconductor memory device and the external nonvolatile memory can be automatically performed. Therefore, the effect obtained by the first semiconductor memory device and a reduction in load of the external CPU and high-speed transfer of data can be realized.
In the semiconductor memory device, the memory element may include memory cells with a DRAM configuration of which each memory cell includes one transistor and one capacitor. The memory element can be accessed by an interface compatible to a general-purpose asynchronous SRAM and at a timing available to the general-purpose asynchronous SRAM. Thus a large-capacity memory system can be realized at low cost.
In the semiconductor memory device, the interface circuit may have a buffer memory having a capacity equivalent to data size of a sector as the access unit of the nonvolatile memory so as to enable data to be transferred between an arbitrary sector of the nonvolatile memory and the buffer memory by an instruction from the CPU. Thus the buffer memory can be used as a work area of the CPU.
The buffer memory can be randomly accessed in units of bytes. Thus the nonvolatile memory element can be randomly accessed from the CPU.
The semiconductor memory device further may comprise an ECC circuit for performing generation of an error correction code, error detection, and error correction to data transferred between the buffer memory and the nonvolatile memory element. Thus a memory system having high data reliability can be realized.
The semiconductor memory device may be stowed together with the nonvolatile memory in one package. Thus the number of pins of the entire circuit can be reduced, and the semiconductor memory device can be advantageous to the mounting area of a substrate or to wiring patterns. Therefore, a reduction in size of an information device such as a portable telephone using the semiconductor memory device, and mounting density of circuits can be raised.
REFERENCES:
patent: 4992651 (1991-02-01), Takahira
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Pitts Harold I.
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