Two-stage operational amplifier

Amplifiers – With semiconductor amplifying device – Including particular power supply circuitry

Reexamination Certificate

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C330S257000, C330S261000

Reexamination Certificate

active

06664857

ABSTRACT:

BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a two-stage operational amplifier having an input stage whose input can be supplied with a signal that is to be amplified and whose output provides a first amplified signal. The amplifier further has an output stage whose input side is connected to the output of the input stage and at whose output a second amplified signal can be derived.
A configuration of the generic type is specified in Japanese Patent Abstract JP 11088070 A, for example. This document specifies an amplifier circuit having an input stage supplied by a first supply voltage and a downstream output stage supplied by a second supply voltage, where the second supply voltage is higher than the first supply voltage.
The printed document by Tietze, Schenk, titled “Halbleiter-Schaltungstechnik [Semiconductor Circuitry]”, 9
th
edition 1990, pages 542-546 specifies integrated voltage regulators for providing a stabilized DC voltage.
Standard CMOS technology normally features a low withstand voltage within specified limits. For higher voltages, such as can arise on application specific integrated circuit (ASIC) interfaces, high-voltage CMOS technology is suitable, by way of example, but a feature of this is an increased chip area requirement, and also it cannot be integrated in a conventional standard CMOS production process without additional complexity.
There is also high-voltage bipolar transistor technology. However, an operational amplifier constructed entirely or predominantly from high-voltage bipolar transistors has a large area requirement, a low phase reserve on account of the high parasitic capacitances of high-voltage bipolar transistors, a large amplifier offset, caused by the relatively low current gain, and a relatively poor power supply rejection ratio (PSRR), which is likewise caused by the high parasitic capacitances.
Another two-stage operational amplifier of the generic type, in the form of a class AB rail-to-rail operational amplifier, is specified, by way of example, in the reference titled “Design of Low-Voltage, Low-Power Operational Amplifier Cells”, by Ron Hogervorst et al., Cluver Academic Publishers, Boston, on page 151.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a two-stage operational amplifier which overcomes the above-mentioned disadvantages of the prior art devices of this general type, which is suitable for high output voltages and has a good PSRR response.
With the foregoing and other objects in view there is provided, in accordance with the invention, a two-stage operational amplifier. The amplifier contains an input stage having an input for receiving a signal to be amplified and an output providing a first amplified signal, an output stage having an input side connected to the output of the input stage and an output providing a second amplified signal, and a voltage regulator having an output connected to the input stage and supplying the input stage with a first supply potential. The voltage regulator further has an input connected to the output stage and supplies the output stage with a second supply potential. The output stage has at least one output transistor and a quiescent-current setting circuit provided for the output transistor. The quiescent-current setting circuit is connected to the output of the voltage regulator and receives the first supply potential.
The object is achieved with a two-stage operational amplifier as cited in the introduction in which the device for voltage reduction, in the form of a voltage regulator, is provided. The voltage regulator has an output connected to the input stage in order to supply the latter with a first supply potential and whose input is connected to the output stage and supplies a second supply potential. The output stage has a quiescent-current setting circuit for at least one output transistor in the output stage, the quiescent-current setting circuit being connected to the first supply potential in order to receive a voltage.
The operational amplifier can have more than two stages.
The magnitude of the first supply potential supplying the input stage is smaller than that of the second supply potential supplying the output stage.
The supply of voltage to the output stage being a higher, second supply potential has the advantage that it is possible to combine various technologies, for example standard CMOS technology and high-voltage bipolar technology, within one operational amplifier. A two-stage operational amplifier developed in this manner can largely be constructed using standard MOS transistors, can be produced using relatively little chip area and with a good PSRR response, and is suitable for high output voltages.
To improve the operational amplifier further, inter alia with regard to power consumption and area requirement, not only the input stage and the quiescent-current setting circuit for at least one output transistor in the output stage but also other circuit parts in the output stage can be supplied with the lower, first supply potential.
To derive the lower, first supply potential from the higher, second supply potential, the device for voltage reduction can be in the form of an internal voltage regulation circuit which can be optimized in terms of the PSRR and the first supply potential's voltage stabilization, so that, in the event of the occurrence of interference pulses at the level of the second supply potential, only negligibly small disturbances are overcoupled onto lines carrying the first supply potential, and again only a small portion of these disturbances spreads to the input stage of the two-stage operational amplifier.
Whereas the second supply potential can be situated in a range from −18 V to +25 V, the first supply potential derived therefrom, whose magnitude is smaller than that of the second supply potential, is +3 volts, for example. In many applications-specific integrated circuits (ASICs), such a low internal chip supply voltage of, for example, +3 volts, which is an improvement in terms of PSSR and voltage stabilization, is already present anyway for the signal-processing CMOS circuit parts of the ASIC, which results in that the two-stage operational amplifier described can be produced with the least possible complexity while providing effective suppression of disturbances related to the supply of power.
In one preferred embodiment of the invention, the input stage features a differential amplifier, to which the signal to be amplified can be supplied, and a convoluted cascode circuit connected downstream of the differential amplifier. Since the cascode circuit is provided in the input stage of the two-stage operational amplifier, which input stage can be operated at the lower, first supply potential, the cascode circuit can be produced with a small chip area, with low parasitic capacitances and with a higher PSRR. The cascode circuit described also allows low input signal potentials to be processed and allows PMOS transistors to be used. The signal that can be tapped off on the output side of the cascode circuit is simultaneously the input signal for the output stage of the two-stage operational amplifier.
In another advantageous embodiment of the present invention, the output stage features a respective quiescent-current setting circuit which is provided for a respective output transistor, among which a first output transistor is connected to the second supply potential and a second output transistor is connected to a reference-ground potential. The quiescent-current setting described for the output stage of the two-stage operational amplifier allows a reduction of transfer distortions in the second amplified signal that can be derived on the output side of the output stage. In addition, the quiescent-current setting can ensure the stability of any desired output voltages and of load resistors of any desired value in applications in which the operational amplifier is operated using feedback networks.
In another advantageous embodiment of t

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