CMOS high-speed differential to single-ended converter circuit

Details CMOS high-speed differential to single-ended converter circuit CMOS high-speed differential to single-ended converter circuit

1996-05-23

1998-10-13

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Nonlinear amplifying circuit

327374, 327407, 327333, 327 70, 330253, 330295, 326 66, H03F 345, H03K 1704

Patent

active

058218092

ABSTRACT:
A CMOS differential to single-ended converter is implemented. A differential input stage comprised of a pair of N-channel transistors draws current through two fixed current P-channel load transistors. A first N-channel differential transistor provides negative feedback bias control of a current source transistor coupled to the differential input stage. The negative feedback control provides increased current gain in the second N-channel transistor, which drives a CMOS inverter to a full rail-to-rail voltage swing on its output.

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