Manufacturing a semiconductor wafer according to the process...

Details Manufacturing a semiconductor wafer according to the process... Manufacturing a semiconductor wafer according to the process...

2002-06-20

2003-02-04

Nguyen, Tuan H. (Department: 2813)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C438S692000, C438S693000, C438S959000, C438S633000

Reexamination Certificate

active

06514861

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor technology, and more particularly to a method to predict the removal rate of chemical mechanical polishing to precisely control the polishing time for wafers.
2. Description of the Related Art
As semiconductor devices are scaled down, the importance of chemical mechanical polishing (CMP) to the fabrication process increases. Generally, a chemical mechanical polishing tool includes a polishing device, a cleaning device, and a measurement device. The polishing device is positioned above a rotatable circular platen or table on which a polishing pad is mounted. However, as the removal rate of CMP decreases with consumption of the polishing pad, it is difficult to control polishing time for polishing wafers. In order to control the polishing time for wafers, it is necessary to estimate the removal rate of the wafer. That is, the precise polishing time can be input to the CMP tool by properly predicting the removal rate of the wafers. As a result, the desired polishing thickness of layers to be polished on the wafers can be obtained.
FIG. 1
is a flow chart for controlling chemical mechanical polishing according to the prior art. First, in step S
1
, a measurement device measures the pre-polishing thickness of the control wafer. Next, in step S
2
, the control wafer is placed in the CMP tool to polish with polishing time input. Next, in step S
3
, the measurement device then measures the post-polishing thickness of the control wafer. Next, in step S
4
, a removal rate is obtained by the predetermined polishing time and the control wafer's thickness difference between pre-polishing and post-polishing. Next, in step S
5
, the measurment device measures the thickness of a layer to be polished on the product wafer. Next, in step S
6
, a new polishing time is determined by the removal rate of the control wafer and the desired polishing thickness of the layer to be polished on the product wafer. Next, in step S
7
, the product wafer is polished according to the polishing time. Next, in step S
8
, the thickness of the product wafer is measured. Next, step S
9
determines whether the next product wafer is to be polished. If not, the CMP is finished, as indicated at step S
10
. If the next product wafer is to be polished, steps S
5
to S
8
are repeated. The determining of the polishing time, as indicated in step S
6
, accords to the removal rate of the previous wafer or lot thereof and the desired polishing thickness of the present wafer or lot of the product wafers. In general, a simple linear combination between the previously measured removal rate of the control wafer and the previously predicted removal rate is used to predict a present removal rate. Thereafter, a polishing time for the product wafer can be obtained according to the present removal rate.
However, since the variation resulting from the process incoming noise and the removal rate decay due to the consumption of the polishing pad, the polishing time obtained by the mentioned method is not precise. As a result, underpolishing occurs in the product wafers. Accordingly, some methods, such as exponentially weighted moving average (EWMA) and predictor-corrector controller (PCC), have been suggested for precisely predicting the removal rate to obtain the polishing time. Since these methods use a constant weighting factor, CMP consumable problems cannot be overcome. That is, the polishing time cannot be precisely controlled.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a semiconductor process for manufacturing at least one wafer to effectively control the process time by variable weighting factors.
According to an aspect of the invention, there is provided a semiconductor process for manufacturing at least one wafer. First, a previously predicted process rate and a previously measured process rate are provided by a process tool. Next, a presently predicted process rate is obtained by a first linear equation having a first variable weighting factor using the previously predicted process rate and the previously measured process rate as variables. Next, a process time is obtained according to the presently predicted process rate and a predetermined process target to input to the process tool. Finally, the wafer is manufactured according to the process time by the process tool. The first linear equation and the first variable weighting factor are: RR*(t)=W
1
(t)×RR(t−1)+(1−W
1
(t))×RR*(t−1), and W
1
(t)=W
1
+&ggr;
1
t
, 0<&ggr;
1
<1. Where W
1
and &ggr;
1
are experienced constants.
Moreover, in the semiconductor process, a previous adjustment value D(t−1) is further provided. Thereafter, a present adjustment value D(t) is obtained by a second linear equation using the previous adjustment value D(t−1) and the difference of the presently predicted removal rate and the previously predicted removal rate as variables. The presently predicted removal rate is modified by the present adjustment value D(t). The second linear equation has a second variable weighting factor, in which the second linear equation and the second variable weighting factor are: D(t)=W
2
(t)×(RR*(t−1)−RR*(t))+(1−W
2
(t))×D(t−1), and W
2
(t)=W
2
+&ggr;
2
t
, 0<&ggr;
2
<1. Where W
2
and &ggr;
2
are experienced constants.


REFERENCES:
patent: 5637031 (1997-06-01), Chen
patent: 5705435 (1998-01-01), Chen
patent: 6221773 (2001-04-01), Yasui et al.
patent: 6271140 (2001-08-01), Chang

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