Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
2002-05-21
2003-11-18
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C361S091500, C361S091100, C327S310000
Reexamination Certificate
active
06650164
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an off-leak current cancel circuit for canceling off-leak current of a MOS transistor in a CMOS semiconductor integrated circuit.
FIG. 2
shows a configuration example of an input portion of a conventional CMOS semiconductor integrated circuit.
In this input portion, in order to prevent destruction of an internal circuit by surge voltage such as static electricity applied to an input terminal
1
, between the input terminal
1
, a power source potential VDD and a ground potential GND, a P-channel MOS transistor (hereinafter, an MOS transistor will be referred to simply as MOS and the P-channel MOS will be referred to as PMOS)
2
and an N-channel MOS (hereinafter, referred to as NMOS)
3
are arranged so as to protect the inner circuit.
That is, the PMOS
2
has a gate a and a source connected to the power source potential VDD and a drain connected to the input terminal
1
so as to operate as a diode connected in the reverse direction. Moreover, the NMOS has a gate and a source connected to the ground potential GND and a drain connected to the input terminal
1
so as to similarly operate as a diode connected in the reverse direction.
In such an input portion, when a positive surge voltage is applied to the input terminal
1
, the PMOS
2
is turned on and electric current flows from the input terminal
1
via the PMOS
2
to the power source potential VDD. Moreover, when a negative surge voltage is applied to the input terminal
1
, the NMOS
3
is turned on and electric current flows from the ground potential GND via the NMOS
3
to the input terminal
1
. This controls the positive and negative potential increase of the input terminal
1
and protects the input terminal connected to the input terminal
1
from destruction by static electricity.
Since the PMOS
2
and the NMOS
3
are diode-connected in the reverse direction, they are off during a normal operation. However, in the MOS transistor, a current called off-leak current flows even in an off state. The off-leak current is a total of sub threshold current generated between the source and the drain and reverse-direction current in the silicon substrate and the drain pn junction diode, and the total value is very small. However, the off-leak current depends on the dimension of the gate of the MOS, varies depending on the ambient temperature, and especially the current value becomes large under a high temperature (for example, 100° C.). Moreover, in the PMOS
2
and the NMOS
3
in the input portion, a gate width W is made large as compared to a gate length L so as to increase the protection ability (for example, W/L=1000) and accordingly, the off-leak current becomes large. Furthermore, the off-leak current has become large because of lowering of a threshold value voltage due to the reduced voltage of the power source.
When an off-leak current flows to the PMOS
2
and NMOS
3
in the input portion, the off-leak current changes the potential of the input terminal
1
and affects the analog operation in the internal circuit. For example, in
FIG. 2
, the off-leak current IL flowing in the PMOS
2
divided to flow to the NMOS
3
and the signal source connected to the input terminal
1
. The current flowing into the signal source fluctuates the potential of the input terminal
1
, which disables normal analog operation in the internal circuit.
SUMMARY OF THE INVENTION
The present invention may provide an off-leak current cancel circuit for canceling an off-leak current in a MOS transistor.
An off-leak current cancel circuit of the present invention includes an input terminal, an input protection circuit, a current cancel circuit and a current providing circuit. The input protection circuit has a first protection transistor connected between the input terminal and a high power supply potential source, and a second protection transistor connected between the input terminal and a low power supply potential source. The first protection transistor flows a first off-leak current. The second protection transistor flows a second off-leak current. The current cancel circuit has a first monitor transistor for flowing a third off-leak current that is a first times smaller than the first off-leak current, and a cancellation circuit for flowing the first off-leak current to the low power supply potential source in response to the third off-leak current. The current providing circuit has a second monitor transistor for flowing a fourth off-leak current that is a second times smaller than the second off-leak current, and a providing circuit for providing the second off-leak current from the high power supply potential source in response to the fourth off-leak current.
REFERENCES:
patent: 5079516 (1992-01-01), Russell et al.
patent: 5563587 (1996-10-01), Harjani
patent: 6222780 (2001-04-01), Takahashi
Lam Tuan T.
Nguyen Hiep
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
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