Semiconductor wiring device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

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Details

C257S758000, C257S759000

Reexamination Certificate

active

06580171

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a multilayer structure of an LSI, and relates, more particularly, to a semiconductor device having a multilayer structure for achieving high reliability of wiring.
A defect of electromigration (hereinafter to be referred to as EM) that has a most serious problem in LSI wiring occurs in the following mechanism. A metal atom forming a wiring shifts from a cathode (−) side to an anode (+) side. In this case, tensile stress is accumulated at the cathode side of the wiring as the density of the metal atom decreases. When the tensile stress exceeds a critical stress, a void is generated, and this breaks the wiring.
The stress of the wiring can be reduced to minimize the occurrence of the EM when an insulation film surrounding the wiring receives the stress from the wiring so that the insulation film can be deformed. However, according to a conventional semiconductor device, both a plasma SiO
2
film and a plasma SiN film that have been used for interlayer insulation films have a relatively large Young's modulus of 50 GPa or above. These films are not deformed to a noticeable level when they receive stress. Therefore, the EM resistance has been low in the conventional semiconductor devices.
In some conventional semiconductor devices, insulation films having low Young's modulus are formed in contact with the wiring. However, in this case, there arises a problem in crack resistance, water absorbing power, water permeability and the like.
As explained above, according to the conventional semiconductor devices, the Young's modulus of the insulation films formed in contact with the wiring have been high, and thus, the insulation films are not deformed to a noticeable level when the insulation films have received stress. Therefore, the EM resistance has been low in these semiconductor devices. Further, in the case of a semiconductor device having high EM resistance with a structure that insulation films of low Young's modulus are formed in contact with the wiring, there occurs a problem in crack resistance, water absorbing power, and water permeability.
BRIEF SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device with improved EM resistance while keeping crack resistance of interlayer insulation films.
In order to achieve the above object, according to one aspect of the invention, as shown in
FIG. 7A
, there is provided a semiconductor device including a wiring, a first insulation film formed in contact with at least one surface of this wiring, and a second insulation film formed on the first insulation film in contact with the first insulation film and having a higher Young's modulus than that of the first insulation film, wherein when the wiring, the first insulation film and the second insulation film have coefficients of linear thermal expansion &agr;M, &agr;s and &agr;h respectively, Young's moduli EM, Es and Eh respectively, and film thickness dM, ds and dh respectively, and when coefficients determined by materials that structure the wiring are expressed as k
1
, k
2
, when it is defined that dI=ds+dh, EI=(dsEs+dhEh)/dI, and &agr;I=(ds&agr;s+dh&agr;h)/dI, and also when a gradient.of the stress working on the wiring depending on temperature is expressed as s, the wiring, the first insulation film and the second insulation film respectively satisfy a condition given by the following Expression (1):
s
=
k
1

E
M

E
I
E
M
+
E
I
·
(
α
M
-
k
2

α
I



d
I
d
M
)
Further, according to another aspect of the invention, as shown in
FIG. 7B
, there is provided a semiconductor device including a substrate, a first insulation film formed on the substrate through at least an insulation layer, a first wiring, a second wiring and a third wiring selectively formed on the first insulation film, and a second insulation film formed on the first insulation film in contact with the first insulation film and having a higher Young's modulus than that of the first insulation film, wherein the first wiring, the second wiring and the third wiring are formed on mutually different layers of the first insulation film, and when the first to the third wirings, the first insulation film and the second insulation film have coefficients of linear thermal expansion &agr;M, &agr;s and &agr;h respectively, Young's moduli EM, Es and Eh respectively, when a sum of film thickness of the first to the third wirings, a film thickness of the first insulation film and a film thickness of the second insulation film are expressed as dM, ds and dh respectively, when coefficients determined by materials that structure the first to the third wirings are expressed as k
1
, k
2
, when it is defined that dI=ds+dh, EI=(dsEs+dhEh)/dI, and &agr;I=(ds&agr;s+dh&agr;h)/dI, and also when a gradient of the stress working on the first to the third wirings depending on temperature is expressed as s, the first to the third wirings, the first insulation film and the second insulation film respectively satisfy a condition given by the following Expression (2):
s
=
k
1

E
M

E
I
E
M
+
E
I
·
(
α
M
-
k
2

α
I



d
I
d
M
)
In
FIG. 7B
, film thickness of the first wiring is expressed as dH
1
, that of the second wiring is expressed as dH
2
, and that of the third wiring is expressed as dH
3
. So the sum of film thickness of the first to the third wirings dM equals to (dH
1
+dH
2
+dH
3
).
A current density coefficient n that is known as one of parameters of the reliability of EM resistance is a yardstick for expressing the reliability of EM resistance, like MTF (Mean Time to Failure) and activation energy. When the n-value is larger, the reliability of EM resistance is higher. In the conventional semiconductor device, when only one layer of an insulation film is formed in contact with the wiring, and when the insulation film is not deformed by the stress received from the wiring, the n-value is ideally determined as two. This value is obtained from a time taken (incubation time) before the resistance starts to increase due to the EM. This n-value will never take a larger value than two.
On the other hand, when a coefficients of linear thermal expansion of the insulation film is constant, it is considered that the smaller a gradient s-value of the stress working on the wiring depending on temperature is, the larger an effect of reduction in the stress due to the deformation of the insulation film is. This stress reduction effect is similarly obtained when a stress is generated in the wiring due to EM, as well as when a thermal stress is generated.
When a wiring is surrounded by an insulation film, the gradient of the stress working on the wiring depending on temperature is usually expressed by the following expression.
s=d&sgr;/dT=EM
×(&agr;
M−&agr;I
)
However, this expression applies to a case where the insulation film is not deformed by the stress received from the wiring. A TEOS-SiO
2
film and an SiN film that are used as an interlayer insulation film have a high Young's modulus of 50 GPa respectively, and their coefficients of linear thermal expansion are not larger than one-tenth of that of Al. Therefore, a negligibly small volume of deformation occurs in the insulation film due to the stress received from the wiring.
When an insulation film having a Young's modulus not higher than 15 GPa is used around the wiring, the insulation film is deformed by the stress received from the wiring. The stress of this wiring decreases based on this deformation. In this case, a gradient of the stress working on the wiring depending on temperature is given by the following Expression (3).
s
=

σ

T
=
k
1

E
M

E
I
E
M
+
E
I
·
(
α
M
-
k
2

α
I



d
I
d
M
)
In the above expression, EI represents a Young&apo

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