Adhesive bonding and miscellaneous chemical manufacture – Methods – Surface bonding and/or assembly therefor
Reexamination Certificate
2002-06-24
2003-11-25
Lorengo, Jerry A. (Department: 1734)
Adhesive bonding and miscellaneous chemical manufacture
Methods
Surface bonding and/or assembly therefor
C156S230000, C156S247000, C156S250000, C156S289000, C428S040100, C428S343000, C427S096400, C029S740000, C029S877000, C257S780000, C438S612000
Reexamination Certificate
active
06652688
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a process for adhering an adhesive film onto a bump-formed side of a wafer having bump-formed thereon. The invention relates to a process for producing a semiconductor wafer having an adhesive film, which enables to minimize void inclusion upon production of the semiconductor wafer having the adhesive film. The invention relates to a process for producing a semiconductor device by mounting a semiconductor element (chip) on a wiring circuit board such as a mother board or a daughter board with a face-down structure, which comprises using an adhesive film for underfill adhered to the chip to seal (encapsulate).
2. Description of the Related Art
In recent years, a method has attracted attention which comprises mounting a chip of face-down structure onto a wiring circuit board such as a mother board or a daughter board having formed thereon a wiring circuit (flip-chip system, direct chip attach system, or the like) in order to more improve the performance of semiconductor devices. Conventional mounting methods involve various problems with respect to performance. For example, in case when a chip is mounted on a wiring circuit board in the form of being packaged in contact with a lead frame via a gold wire, there might arise delay of transmitting information due to wiring or information-transmitting errors due to cross talk.
In contrast, the aforesaid mounting method employing the face-down structure, in which a surface electrode of a chip is directly connected to a wiring circuit board, enables to reduce thickness and weight of a semiconductor device. However, in the mounting method according to the flip-chip system, a direct chip attach system, or the like having the above-described structure, a chip and a wiring circuit board different from each other in coefficient of linear expansion are directly electrically connected, and hence reliability of the connecting portion is of extreme importance.
Therefore, a liquid thermosetting resin, called underfill material, is injected into a gap between the chip and the wiring circuit board, and is cured to form a resin cured body which functions to disperse a stress which might otherwise be concentrated onto the electrically connecting portion, thus improvement of reliability on the connection being intended.
However, in order to inject the liquid thermosetting resin into a gap between the chip and the wiring circuit board, it is required to provide a space for disposing an injection nozzle at the periphery of a position where the chip is to be mounted. With the progress of reduction in size and thickness of a semiconductor device, it has become difficult to secure a space for disposing the injection nozzle, and hence it has been demanded to improve the step of injecting (forming an underfill) a liquid resin. Also, there is involved a problem that the time for the step is prolonged so as to inject the liquid resin for each chip.
In order to solve the problems, the inventors have formerly proposed a method of adhering an adhesive film for underfill to a semiconductor wafer before being cut into individual chips using a film-like adhesive for forming the underfill, then cutting into individual chip size (Japanese Patent Application No. 72074/2001) to there by greatly shorten the time for the step. However, generation of void is unavoidable in the actual step of adhering the adhesive film for underfill to the semiconductor wafer.
SUMMARY OF THE INVENTION
An object of the invention is to markedly reduce voids included in the adhesion layer upon adhering an adhesive film such as an underfill to a semiconductor wafer.
The invention provides a process for producing a semiconductor wafer having an adhesive film by adhering an adhesive film onto a bump-formed surface of a semiconductor water having formed thereon bumps with a predetermined arrangement, which comprises determining a particular arrangement axis direction in which intervals between adjacent linear arrangement axes connecting the bumps becomes the shortest, and adhering the adhesive film in the direction substantially at a right angle with the determined arrangement axis direction. That is, in the case of adhering an adhesive film onto a bump-formed surface of a semiconductor wafer provided with peripheral bumps, the semiconductor wafer with the adhesive film is produced by conducting the adhering in a direction at a right angle with the oblique side of a right triangle drawn by connecting the corner bump and two bumps adjacent thereto with respect to the outermost bump arrangement. Also, in the case of adhering an adhesive film onto a bump-formed surface of a semiconductor wafer provided with area bumps, the semiconductor water with the adhesive film is produced by conducting the adhering in a direction at a right angle with the oblique side of a right triangle drawn by connecting the corner bump and two bumps adjacent thereto with respect to the outermost bump arrangement. Additionally, with the normal lattice area bumps, the adhering direction can also be defined as a direction at a right angle with the oblique side of a right triangle drawn by connecting the corner bump and two bumps adjacent thereto with respect to the outermost bump arrangement. As a material for constituting the adhesive film to be used in the invention, thermosetting resin compositions are preferred, with a polycarbodiimide resin composition being particularly preferred. In addition, the invention also provides a process for producing a semiconductor device by mounting, after the above-described step, the semiconductor wafer on a wiring circuit board using the adhesive film as an unterfill.
REFERENCES:
patent: 5814401 (1998-09-01), Gamota et al.
patent: 6221691 (2001-04-01), Schrock
patent: 6323062 (2001-11-01), Gilleo et al.
patent: 6352881 (2002-03-01), Nguyen et al.
patent: 2002-203874 (2002-07-01), None
Hotta Yuji
Matsumura Akiko
Misumi Sadahito
Lorengo Jerry A.
Nitto Denko Corporation
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