Ferroelectric memory and method for manufacturing same

Semiconductor device manufacturing: process – Having magnetic or ferroelectric component

Reexamination Certificate

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Details

C438S240000, C438S250000, C438S393000, C257S295000

Reexamination Certificate

active

06656747

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to a ferroelectric memory and method for manufacturing same and, more particularly, to a ferroelectric memory with a structure formed, on an insulation film, with a lower electrode, a ferroelectric and an upper electrode in this order, and a method for manufacturing such a ferroelectric memory.
2. Description of the Prior Art
The conventional ferroelectric memory
1
of this kind, shown in
FIG. 13
, includes a not-shown semiconductor substrate and a first insulation film
2
formed thereon. On the first insulation film
2
, a lower electrode
3
, a ferroelectric film
4
and an upper electrode
5
are formed in this order. Further, a second insulation film
6
is formed in a manner covering these films. To fabricate a ferroelectric memory
1
, a conductive film
3
a
is formed of platinum (Pt) or the like by sputtering over the first insulation film
2
formed on the semiconductor substrate, as shown in FIG.
14
(A). Then, a ferroelectric film
4
a
is formed of lead zirconate titanate (PZT) or the like on the conductive film
3
a
by a sol-gel process. A conductive film
5
a
is further formed by sputtering platinum (Pt) or the like over the ferroelectric film
4
a
. Then, as shown in FIG.
14
(B) dry etching is conducted sequentially on the conductive film
5
a
, the ferroelectric film
4
a
and the conductive film
3
a
, thereby providing an upper electrode
5
, a ferroelectric film
4
and a lower electrode
3
. Thereafter, an insulation film
6
(
FIG. 13
) is formed in a manner covering these films by a CVD process.
In the prior art, however, a conductive film
5
a
, a ferroelectric film
4
a
and a conductive film
3
a
are formed to a thickness to provide an upper electrode
5
, a ferroelectric film
4
and a lower electrode
3
, so that dry etching is then conducted throughout a total film thickness in order to remove unwanted portions of these films, Thus, the prior art has required a much etch amount and hence a long etch time. This results in long-time exposure of the ferroelectric film
4
to the plasma atmosphere during a dry etch process. The plasma however has effects upon the ferroelectric
4
to lower its switching charge amount (Qsw). Thus, there has been a fear of causing such problem as worsening the symmetry in hysteresis and deteriorating the characteristics of coerciveness and fatigue.
SUMMARY OF THE INVENTION
It is therefore a primary object of the present invention to provide a ferroelectric memory having a ferroelectric characteristic that is free from deterioration, and a method for manufacturing same.
A ferroelectric memory according to the present invention, comprises: an insulation film; a hollow formed in a top surface of the insulation film; a lower electrode formed in the hollow; a ferroelectric formed on the lower electrode; and an upper electrode formed on the ferroelectric.
A manufacturing method according to the invention is a method for manufacturing a ferroelectric memory having a lower electrode, ferroelectric and upper electrode formed on an insulation film, characterized in that a hollow is formed in a surface of the insulation film and then a lower electrode is formed in the hollow by a process including an application process.
A hollow is formed in a top surface of an insulation film, and a lower electrode is formed in the hollow by a process including a spin coating method (e.g. sol-gel method). In a spin-application process, a precursor solution is dripped on the surface of the insulation film and splashed away by a centrifugal force. Consequently, the conductive film being formed has a thickness increased in a hollow portion that the precursor solution is ready to collect, i.e. a portion to be formed into a lower electrode, and decreased in other portion than the hollow. Accordingly, when etching the conductive film to form a lower electrode, it is satisfactory to etch only the portion other than the hollow, i.e. the thickness decreased portion of the conductive film, enabling etching in a brief time. However, where leaving the thinned portion of the conductive film for an interconnection, no etching is required. Also, if a first electrode portion is formed in a corner of the hollow by a process including a spin coating method and further a second electrode portion is formed thereon by a process including a spin coating method, a resulting lower electrode is reduced in amount of a depression caused in a top surface center. Meanwhile, if a first electrode portion is formed at a hollow corner by a process including a spin coating method and further a second electrode portion is formed thereon by sputtering, a resulting lower electrode is reduced in variation of crystalline orientation thereof. If a film is formed in a predetermined depth position with respect to a top surface of the insulation film to form a hollow in the insulation film by using this film as an etch stop, the hollow will have a flat bottom surface at the predetermined depth position. Further, the film blocks the water content of the insulation film from reaching the ferroelectric through the lower electrode. Furthermore, if the lower electrode in the hollow and the insulation film at their top surfaces are planarized flush with each other, there is no necessity to etch the conductive film at portions other than the hollow in the later process. If a thin film is formed on a planarized lower electrode by using a same material as the lower electrode, eliminated is surface roughening caused on the lower electrode upon planarization.
According to the invention, it is possible to shorten a time for which the dielectric is exposed to a plasma atmosphere during a dry etch process. Thus, the ferroelectric can be prevented from being deteriorated in characteristics by a plasma effect.
Also, the ferroelectric can be stabilized in crystallinity and orientation by forming a first electrode portion at a hollow corner and a second electrode portion thereon to provide a lower electrode or by forming a thin film on a planarized lower electrode.
Further, if a film is formed in the insulation film at a predetermined depth position with respect to a top surface thereof to form a hollow by utilizing the film as an etch stop, the hollow can be made flat in its bottom surface in the predetermined depth, making possible to stably form a lower electrode. Also, this film serves to block the moisture content of the insulation film from reaching the ferroelectric, thus preventing the ferroelectric from being deteriorated in characteristics.
The above described objects and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 5561307 (1996-10-01), Mihara et al.
patent: 5652446 (1997-07-01), Sakao
patent: 5767541 (1998-06-01), Hanagasaki
patent: 5801916 (1998-09-01), New
patent: 5834348 (1998-11-01), Kown et al.
patent: 0697719 (1996-02-01), None
patent: 0886317 (1998-12-01), None
patent: 05-327062 (1993-12-01), None
patent: 11-251549 (1999-09-01), None

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