Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Including integrally formed optical element
Reexamination Certificate
2002-08-12
2003-11-25
Le, D (Department: 2818)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Including integrally formed optical element
C438S153000, C438S158000
Reexamination Certificate
active
06653160
ABSTRACT:
This application claims the benefit of Korean Patent Application No. 1999-57330 filed on Dec. 13, 1999, under 35 U.S.C. §119, the entire contents of which are herein fully incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a method of manufacturing the liquid crystal display device (LCD) with a four-masks process.
2. Description of Related Art
An LCD device has a lower substrate or array substrate having switching elements and pixel electrodes, and an upper substrate having a common electrode. Between the lower and upper substrates liquid crystal material is filled.
For more detailed explanation, the array substrate needs more processes than the upper substrate does. The switching element has a gate electrode, a source electrode, a drain electrode, and an active layer. The source electrode is extended from a data line and the gate electrode is extended from a gate line. The gate and data lines cross each other to form a matrix shape, and every region that is defined by crossing the gate and data lines is called a pixel region.
In order to form one layer of the array substrate, a deposition process, a photolithography process, and an etching process are needed. Sometimes, the photolithography process is said to include the deposition process and the etching process. For an array substrate, an insulating material, a semiconductor material, and a conductive material are used.
For the insulating material, a non-transparent material such as silicon nitride and silicon oxide, and a transparent polymer material such as benzocyclobutene (BCB) are used. For the active layer, there are two types: amorphous silicon and poly crystallized silicon. For the conductive material, aluminum, aluminum alloy, molybdenum, tantalum, and molybdenum-tungsten alloy are used.
A chemical vapor deposition method, a sputtering method and other methods are used in order to deposit the materials. For the etching process, a wet etching process and a dry etching process are used. The wet etching process is generally used for etching the conductive material for the gate and data lines and pixel electrode. The dry etching process is generally used for smaller and more accurate pattern such as active layer and insulating layer, and some conductive layers.
Since one mask process requires deposition and lithography and etching processes, it is necessary to reduce the number of masks for manufacturing the array substrate. Thus, recently the four-mask process is suggested. But, in this method, more than one layer should be etched, deteriorating uniformity of the etched layer.
Hereinafter, a manufacturing method for an array substrate is explained with reference to drawings.
FIG. 1
is a partial plane view of a typical array substrate for an LCD device. There is shown a thin film transistor “T” near the cross point of the data and gate lines
13
and
15
, which also define the pixel region “P”. There is also shown a storage capacitor “Cst” that must have a first electrode and a second electrode. The gate line
15
acts as the first electrode for the capacitor “C” and the pixel electrode
17
acts as the second electrode for the capacitor “Cst”.
The storage capacitor “Cst” helps to maintain the transmitted signal to the liquid crystal material during between the transmitting signals. The storage capacitor is electrically parallel to the liquid crystal material. The storage capacitor can be formed as shown in
FIG. 1
or independent of the gate line
15
. The former is called storage capacitor-on-gate (Cst-on-Gate) structure, and the latter is called independent storage capacitor structure. These days the former structure shown in
FIG. 1
is generally adopted.
FIGS. 2A
to
2
D are cross sectional views taken along line II—II of FIG.
1
. These drawings illustrate a manufacturing process of the array substrate according to a related art.
As shown in
FIG. 2A
, in order to form a gate line
15
, first a conductive material is deposited on the substrate
11
to form a first metal layer. The conductive material is chosen from a group consisting of aluminum, molybdenum, tungsten, and so on. Sometimes dual layer structure of aluminum and chrome or tungsten is adopted. On the entire first metal layer, a photoresist is coated. Then using a first mask having a gate line shape, the photoresist is exposed to light, and some of the photoresist is removed, leaving a portion of photoresist having a gate line pattern. Then, the first metal layer is etched to form a gate line and the remaining photoresist is removed.
FIG. 2B
illustrates a second mask process. On the gate line
15
and the substrate, a gate insulating layer
19
made of a gate insulating layer, a semiconductor layer
21
made of a pure amorphous silicon layer, an ohmic contact layer, and a conductive material layer or second metal layer are formed and stacked sequentially. Then using a second mask, after the lithography process explained above with reference to
FIG. 2A
, the second metal layer is etched to form a data line
13
crossing the gate line
15
and a metal portion
13
a
having an island shape above the gate line
15
. After that, the ohmic contact layer is etched to form an ohmic contact layer
22
having the same pattern as the data line
13
and the metal portion
13
a.
FIG. 2C
illustrates a third mask process. An insulating material is deposited on the whole substrate after the process shown in
FIG. 2B
to form a protection layer
23
. Then using a third mask, photoresist
27
is only left over the data line
13
and over a portion for a thin film transistor “T” (see FIG.
1
). Thus, portions of the array substrate can be divided into three portions: “A” portion having the photoresist
27
and other layers; “B” portion having a sectional structure composed of the gate insulating layer
19
, semiconductor layer
21
and protection layer
23
; and “C” portion having a sectional structure composed of the gate line
15
, gate insulating layer
19
, semiconductor layer
21
, ohmic contact layer
22
, metal portion
13
a
and protection layer
23
. As can be imagined from
FIG. 1
, “A” portion corresponds to a data line portion, “B” portion to a pixel region “P”, and “C” portion to a storage capacitor portion “Cst”.
As shown in
FIG. 2D
, using the photoresist
27
, “A”, “B”, and “C” portions are all etched at the same time with only a single etching gas using a dry etching method. As a result, at “A” portion, the layers
23
,
22
,
21
,
13
, and
19
under the photoresist
27
are left; at “B” portion, no layer is left; and at “C” portion, the gate insulating layer
19
a
having a non-uniform thickness “t” is left due to the etching rate and metal portion
13
a
shown in FIG.
2
C. The gate insulating layer
19
a
on the gate line
15
acts as a dielectric layer of the storage capacitor “C” (see FIG.
1
).
However, since multiple layers are simultaneously etched at one time using a single etching gas and the gate insulating layer should remain on the gate line
15
, the remaining gate insulating layer
19
a
cannot have a uniform thickness throughout the whole pixel regions “P” (see
FIG. 1
) and/or their boundaries and cannot have a smooth surface as shown in FIG.
2
D. Thus the capacitance of the capacitor “Cst” varies according to the position of the pixel region and the property of the capacitor is degraded due to a surface roughness of the gate insulating layer
19
a
, which results in deteriorating display quality of the LCD device.
SUMMARY OF THE INVENTION
To overcome the problems described above, preferred embodiments of the present invention provide a method of manufacturing an array substrate for use in a liquid crystal display device which can make storage capacitor on the gate line have a uniform capacitance independent of the position of the pixel region.
Preferred embodiments of the present invention further provide another method of manufacturing an array substrate for use in a liquid crystal display device having
Kim Hu-Sung
Moon Kyo Ho
Birch & Stewart Kolasch & Birch, LLP
Le D
LG. Philips LCD Co. LTD
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