Electromagnetic compatible regulator

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Signal transmission integrity or spurious noise override

Reexamination Certificate

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Details

C327S333000, C327S317000

Reexamination Certificate

active

06670842

ABSTRACT:

FIELD OF THE INVENTION
The present invention is related to supply regulators. More particularly, the present invention is related to electromagnetic compliant supply regulators.
STATE OF THE ART
Electrical noise has been recognised as a problem for electrical and electronic devices as from the start of electrical engineering itself. Electrical interference and the frequencies at which it occurs are growing with the rapid spread of electrical and electronic devices.
Today, one must recognise that almost any device which operates on the principle of moving an electron from one point to another can be either a source or receiver of Electromagnetic interference (EMI).
When two electrical or electronic devices must operate together in the same environment or in the same system, the potential for conflict between these unintended transmitters and receivers can present significant, and challenging problems. Some problems are obvious in the first prototype of a new device if it tends to ‘self interfere’. This can happen when the design results in a strong emitter and a sensitive receiver in the same package.
However, if a circuit is only a strong transmitter, or only a sensitive receiver, the potential for later problems is there, but may not be discovered until the design has left the engineering development laboratory, unless the device is tested for electromagnetic compatibility (EMC).
Traditional transconductance regulators are not EMC safe. They can usually be considered as sensitive receivers. Electromagnetic interference will therefore usually lead to instability of the output. Traditional solutions consist of adding filters in the input line for filtering out the EMC noise on this input signal. Such filters are very expensive and require external components.
AIMS OF THE INVENTION
The present invention aims to provide EMC immunity to transconductance regulators with a p-type active component.
SUMMARY OF THE INVENTION
The present invention is a voltage regulator circuit for providing a regulated output voltage at an output terminal, said regulator circuit comprising
a current source, comprising a current source MOSFET,
a current mirror circuit, comprising a driver MOSFET and a follower MOSFET both having the source connected to the substrate, interposed between said current source and said output terminal,
operatively linked as to regulate an input voltage V
in
to said regulated output voltage,
characterised in that the circuit further comprises an EMC stabilising MOSFET having its drain connected to its substrate and placed in series with any of said driver or follower MOSFETs.
In an embodiment of the present invention, the gate of the EMC stabilising MOSFET is coupled to the gate of the follower MOSFET, and the drain of the EMC stabilizing MOSFET is coupled to the source of the follower MOSFET.
In another embodiment, the source of the EMC stabilising MOSFET is coupled to the drain of the follower MOSFET. Preferably, the gate of the EMC stabilising MOSFET is kept at a predetermined voltage (V
bias
). Said predetermined voltage should preferably be external and independent from the input voltage.
In another embodiment, the drain of the EMC stabilising MOSFET is connected to the source of the driver MOSFET.
In a preferred embodiment, the voltage regulator circuit of the invention further comprises a second EMC stabilising MOSFET having its drain connected to its substrate and placed in series with the driver or follower MOSFET. Evidently, this second EMC stabilising MOSFET is placed in series with the MOSFET of the current mirror that wasn't already stabilised by the first EMC stabilising MOSFET.
Preferably, the source of the EMC stabilising MOSFET is connected to the drain of the follower MOSFET and the source of the second EMC stabilising MOSFET is connected to the drain of the driver MOSFET, both gates of said EMC stabilising MOSFET and said second EMC stabilising MOSFET being connected.
Advantageously, the gates of the EMC stabilising MOSFET and the second EMC stabilising MOSFET are kept at a predetermined voltage (V
bias
), which should preferably be external and independent from the input voltage.
Another aspect of the present invention concerns a method for improving EMC stability of an electronic circuit comprising at least one circuit MOSFET, characterised by the step of providing an EMC stabilising MOSFET placed in series with said circuit MOSFET.


REFERENCES:
patent: 5436552 (1995-07-01), Kajimoto
patent: 5510699 (1996-04-01), Theus et al.
patent: 5546029 (1996-08-01), Koke
patent: 6184664 (2001-02-01), Ponzetta
patent: 6313689 (2001-11-01), Horchler
patent: 6556062 (2003-04-01), Wallace

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