Method and apparatus for clock recovery in digital communication

Details Method and apparatus for clock recovery in digital communication Method and apparatus for clock recovery in digital communication

1989-11-16

1994-01-04

Kuntz, Curtis

Pulse or digital communications

Spread spectrum

Direct sequence

375120, 307518, H04L 702

Patent

active

052767124

ABSTRACT:
A technique for recovering a clock from a digitally encoded communication signal uses a low-Q resonator and limiter for generating a coarse clock signal comprising a series of rectangular pulses at a frequency substantially equal to the clock (though subject to phase jitter), and a filter circuit, such as a phase-locked-loop ("PLL"), preferably employing a Sequential Phase/Frequency Detector, to reduce the jitter superimposed on the coarse clock signal, so as to yield a well-behaved clock signal. By using a Sequential Phase/Frequency Detector, acquisition-aid circuitry generally is not required for the PLL.

REFERENCES:
patent: 3246243 (1966-04-01), Widl
patent: 3462702 (1969-08-01), McCormick
patent: 3569853 (1971-03-01), Wolejsza
patent: 3739277 (1973-06-01), Schneider et al.
patent: 3992581 (1976-11-01), Davis
patent: 4151485 (1979-04-01), Lafratta
patent: 4180783 (1979-12-01), Khalifa
patent: 4216544 (1980-08-01), Boleda et al.
patent: 4222117 (1980-09-01), Bugg
patent: 4242754 (1980-12-01), Depouilly et al.
patent: 4320515 (1982-03-01), Burton, Jr.
patent: 4339824 (1982-07-01), Tanimoto
patent: 4389622 (1983-06-01), Kackman
patent: 4466110 (1984-08-01), Kizaki et al.
patent: 4575860 (1986-03-01), Scordo
patent: 4607296 (1986-08-01), Smidth
patent: 4615041 (1986-09-01), Koskinen
patent: 4667333 (1987-05-01), Butcher
patent: 4737970 (1988-04-01), Viola et al.
"The Radio Amateur's Handbook", fifth-ninth edition, American Radio Relay League, Newington; 1982, pp. 2-33-2-36, Tk 6550 R. 162.
Co, R. S. et al., "A Differential PLL Architecture For High Speed Data Recovery", IEEE 1989 Custom Integrated Circuits Conference, May 15-18, 1989, pp. 7.2.1-7.2.4.
Hadley, Les, "PLL Techniques For Clock Recovery From High Speed Data", ICCE 1986 Digest of Technical Papers, Jun. 3-6, 1986, pp. 296-297.

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