Optics: measuring and testing – Shape or surface configuration
Reexamination Certificate
2001-03-26
2003-11-18
Font, Frank G. (Department: 2877)
Optics: measuring and testing
Shape or surface configuration
C356S620000
Reexamination Certificate
active
06650422
ABSTRACT:
TECHNICAL FIELD OF INVENTION
The present invention generally relates to the fabrication of a semiconductor device and more particularly to a method and a system for characterizing a symmetry of feature profiles and using that information to optimize symmetric profile patterning.
BACKGROUND OF THE INVENTION
In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve these high densities there has been and continues to be efforts toward scaling down device dimensions (e.g., at submicron levels) on semiconductor wafers. In order to accomplish such high device packing density, smaller and smaller features sizes are required. This may include the width and spacing of interconnecting lines, spacing and diameter of contact holes, and the surface geometry such as corners and edges of various features.
The requirement of small features with close spacing between adjacent features requires high resolution photolithographic processes. In general, lithography involves the transfer of a pattern or image from one medium to another, as from a mask to a wafer. In particular, a mask can be used to protect one area of the wafer while working on another. For example, a photoresist is applied to a wafer and aligned to a mask. Then light such as ultraviolet radiation can be projected through the mask, thereby exposing the photoresist with the mask pattern. The wafer is then developed to remove the exposed photoresist and baked to harden the remaining photoresist pattern. Areas not covered by the hardened photoresist are then etched away, and the wafer is inspected to ensure the image transfer from the mask to the top layer is correct. This process is repeated several times until all active devices and features have been formed.
During the fabrication process of a semiconductor, for example, during etching, thin film deposition or chemical mechanical polishing, features may become non-uniform in their profile structures. For example, the etching away of a polysilicon feature such as a gate may result in the feature having an asymmetric profile such that one side of the feature is situated at about a 90° angle to the substrate but the opposite side of the feature is situated at an angle greater than or less than the first side. This asymmetry in the feature profile may lead to performance problems or degradation, especially in extremely small devices, caused by the shallow or malformed features in the front end. Inevitably, the device may exhibit poor resistance or conductivity or fail other types of parametric and/or functional criteria, and may thus be rendered sub-standard due to the asymmetric feature profiles.
Therefore, in a production line of semiconductor devices, there is a need to examine the profile of structures such as a feature formed on a wafer quickly, without contacting or destroying the structure prior to the completion of the semiconductor device. There is also a need to optimize fabrication process parameters during semiconductor production to provide more exact control and detection of asymmetric feature profiles.
SUMMARY OF THE INVENTION
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is intended to neither identify key or critical elements of the invention nor delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The structural profile of features formed on a wafer may affect the conductivity and overall performance of a semiconductor device. Asymmetrically formed features may result in reduced performance of the semiconductor device. Thus there is a need to obtain information on feature profiles to determine the quality and preciseness of a fabrication process to prevent asymmetric feature profiles.
The present invention is directed to a method and a system for non-destructively, efficiently and accurately detecting asymmetry in the profile of a feature formed on a wafer during the process of semiconductor fabrication. The system comprises a light source, a stage for a patterned wafer sample, a detector, a processor system including a memory and a processor associated therewith, and a display unit. According to another aspect of the present invention, the system is placed in-situ a semiconductor fabrication line for immediate detection and control to optimize subsequent feature formation.
The method encompasses directing a beam of light or radiation at a first side of a feature. A detector captures and measures a reflected beam associated with the first side of the feature. The light source or the feature is rotated (e.g., about 180 degrees) with respect to the other from an original position and a beam of light is now directed to a second side of the feature. A detector again captures and measures a reflected beam associated with the second side of the feature and the two sets of measurements (from the first and the second sides) are correlated by a processor system using a predetermined correlation threshold. Once correlated, the symmetry or asymmetry of a feature profile is determined.
In particular, the present invention describes a method of detecting asymmetry of a feature profile and comprises placing a patterned wafer with at least one feature formed (e.g., a grating) thereon into a characterization chamber. An incident beam of radiation is then directed at a first side of a feature and a first reflected beam associated with the first side of the feature is detected. An incident beam of radiation is then directed at a second side of the feature and a second reflected beam associated with the second side of the feature is detected. Using the data collected from the first side and the second side of the feature, a pattern profile is determined. By analyzing the determined pattern profile, a type and degree of feature asymmetry is ascertained and utilized to generate feedback or feedforward control data to account and adjust for such asymmetry.
Another aspect of the method comprises directing an incident beam of polarized light at a first side of a feature and detecting a reflected beam to determine a change in the state of polarization before and after reflection. The change in polarization is then employed to ascertain properties associated with the reflecting boundary (e.g., the feature profile). A light source or a stage is then rotated, for example, about 180 degrees from its original position, causing the beam of light to be directed at a second side of the feature and the measurement is performed again.
Another aspect of the present invention allows for direction of a broadband wavelength range of incident light on the feature of interest in a direction generally normal to the wafer surface. The reflected light intensity as a function of wavelength is then detected. The reflection data is then compared to a database of reflection profiles containing numerous reflection signatures associated with different known feature profiles. As a result of the comparison, the profile of the feature of interest and its associated asymmetry is identified. Such identification is then used to generate feedback or feedforward process control data to compensate or correct for such asymmetry in subsequent processing.
In accordance with yet another aspect of the present invention, scatterometry is employed to ascertain the asymmetry of a test structure such as a grating. An incoming light spectra reflects off of the test structure and a detector collects a reflected light intensity and phase profile as a function of wavelength. The profile data is then compared with a database of intensity and phase signatures associated with known feature profiles to identify the profile of the test structure. This process is then repeated for an opposite side of the test structure to ascertain an asymmetry associated therewith. The asymmetry determination is then employed
Rangarajan Bharath
Singh Bhanwar
Subramanian Ramkumar
Templeton Michael K.
Advanced Micro Devices , Inc.
Eschweiler & Associates LLC
Font Frank G.
Nguyen Sang H.
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