Optics: measuring and testing – By alignment in lateral direction
Reexamination Certificate
2000-04-10
2003-02-11
Font, Frank G. (Department: 2877)
Optics: measuring and testing
By alignment in lateral direction
C250S491100
Reexamination Certificate
active
06519036
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus and method for handling semiconductor products, such as wafers and other workpieces. More particularly, the invention relates to a system for pre-aligning and processing a semiconductor wafer in a stepper or scanner exposure manufacturing process.
2. Discussion of the Related Art
Semiconductor dies are typically fabricated on a wafer formed of silicon and/or other materials. Integrated circuits are formed in the dies by photolithographic processes. For each photolithographic process, the wafer is coated with photoresist material, and then a reticle is used to expose a pattern in the photoresist material, and then the exposed photoresist material is removed to form an etch or deposition pattern.
Alignment marks may be etched or otherwise formed in the surface of the wafer. The alignment marks may be used to position the reticle precisely with respect to the die portions. That is, the locations of the die portions may be determined by the exposure apparatus based on the positions of the alignment marks.
In a “global” alignment process, two or more alignment marks, also called “combi” marks, are etched on the periphery of the wafer. A two-dimensional positioning system uses the alignment marks to accurately position a stepper exposure apparatus over successive die portions. The die portions are sequentially located and exposed by the stepper apparatus to develop the desired pattern in each die portion. Then a chemical bath is used to strip away the developed photoresist material, leaving the fine lines that eventually form the working integrated circuits.
During the photolithographic processes discussed above, the same photoresist material that covers the die portions is also coated on the alignment portions. The photoresist material on the alignment portions must be exposed so that it can be removed with the exposed material on the die portions. Unlike the exposure of the die portions, however, the exposure of the alignment mark portions does not require a high degree of accuracy. The apparatus used to expose the photoresist material on the alignment marks does not need to be precisely positioned.
There is a need in the art to reduce the processing time required to fabricate semiconductor devices. In particular, there is a need in the art to reduce the amount of time required to process wafers at exposure workstations.
SUMMARY OF THE INVENTION
The present invention relates to a system for processing a semiconductor wafer (or other workpiece) having a large number of die portions. The system has a first workstation with an alignment mechanism and a tight source. The alignment mechanism is used to pre-align the wafer. The alignment mechanism is also used to locate alignment marks formed in the wafer. The light source is used to expose the alignment mark portions.
In addition, the system has a second workstation having an alignment mechanism and a light source. The second alignment mechanism is used to accurately align the second light source with respect to the alignment marks. The second light source has a reticle and is used to expose the desired pattern into the photoresist material on the die portions. A transport mechanism may be used to transport the wafer to the second workstation.
An advantage of the invention is that, since the alignment mark portions are exposed at the first workstation, they do not need to be exposed at the second workstation. Consequently, the invention makes it possible to reduce the amount of processing time required at the second workstation.
According to another aspect of the invention, the alignment mechanism of the first workstation includes an optical sensor for detecting the peripheral edge of the wafer and/or a notch (or flat) formed in the edge. The alignment mechanism may cooperate with a table supporting the wafer to provide the desired alignment. The alignment mechanism of the first workstation may be less accurate than the alignment mechanism of the second workstation.
The light source at the first workstation may transmit ultraviolet light through a flexible optical fiber cable. The flexible cable may be moved by a motor/encoder assembly laterally from one alignment mark portion to another. The motor/encoder assembly may be operated in accordance with signals from a controller that is operatively connected to other elements of the first workstation.
The present invention also relates to a method of processing a semiconductor wafer. The method includes the steps of pre-aligning the wafer at a first workstation, exposing photoresist material on pre-formed alignment marks at the first workstation, and then, at a second workstation, using the alignment marks to accurately align a stepper exposure apparatus.
A suitable transport mechanism may be used to move wafers to and from the second workstation. In a preferred embodiment of the invention, successive wafers may be supplied on elevators or from a coat/develop track. A robotic apparatus may be used to move the wafers one-by-one from the input source to the first workstation. A mechanism may also be provided for removing processed wafers from the second workstation.
Exposing the alignment mark portions at the first workstation saves overall processing time by reducing the amount of exposure time required at the second workstation. In a preferred embodiment of the invention, ten or more seconds may be saved from the overall processing time for each wafer by exposing the alignment mark portions at the first workstation. Another advantage of the invention is that commercially available equipment may be used to mount and movably support the exposure lamp at the first workstation.
These and other features and advantages of the present invention will become more apparent upon consideration of the following detailed description and attached drawings.
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Font Frank G.
Micro)n Technology, Inc.
Nguyen Tu T.
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