Integrated circuit package having an internal cavity for incorpo

Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor

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3613211, H01G 114, H01G 410

Patent

active

052725901

ABSTRACT:
A decoupling scheme is presented which is particularly well suited for use with integrated circuit packages having internal cavities for receiving an integrated circuit chip such as Pin Grid Array (PGA) packages, ceramic dual-in-line packages, ceramic flat packs and ceramic leadless chip carriers. In accordance with the present invention, a decoupling capacitor (which preferably comprises a very thin high capacitance layer made by a thick film or thin film process sandwiched between an inner and outer electrode layer) is positioned within the internal cavity of an integrated circuit package such as a PGA package and electrically connected to the IC chip within the cavity. In a particularly preferred embodiment, the decoupling capacitor has a novel configuration for improved heat transfer. This novel configuration includes a pair of parallel plate electrodes wherein the upper electrode has extended flaps which wrap around the top surface of the decoupling capacitor.

REFERENCES:
patent: 2972570 (1961-02-01), Haas et al.
patent: 4670833 (1987-06-01), Sachs
patent: 4853826 (1989-08-01), Hernandez
patent: 4918513 (1990-04-01), Kurose et al.
Multilayer Ceramic Capacitors and IC's; E. Philofsky; Electronic Engineering Jun. 1982.
Functional Testing of Decoupling Capacitors For Dynamic Rams; A. G. Martin; AVX Ceramics & Ward Parkinson; Micron Technology 1982.

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