Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2001-02-23
2003-02-04
Sherry, Michael (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S055000, C438S122000
Reexamination Certificate
active
06514791
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to the fabrication of semiconductor devices that include fragile elements. More particularly, the invention is related to a system and a method for smoothing the ends of fragile elements used in heat transfer devices and the semiconductor devices incorporating such heat transfer devices.
BACKGROUND
Known thermoelectric coolers (TECs) for optoelectric semiconductor devices utilize fragile elements formed of bismuth telluride. Bismuth telluride, and other such materials, are susceptible to shear and/or fracture if subjected to physical stress, especially when not properly anchored. In a known method, positively- and negatively-doped elements are restrained by some mechanical means, and then the ends of the elements are smoothed or lapped to the desired size. A disadvantage of the known method is that the doped elements are susceptible to shear and/or fracture during the lapping (smoothing) process. The elements can break, chip or spall.
SUMMARY
The invention relates to an improved method of making a heat transfer device. The heat transfer device may be formed of a plurality of positively-doped and negatively-doped fragile elements. In a preferred embodiment of the invention, the ends of the elements are smoothed to a precise tolerance. The positively-doped elements may be electrically coupled to the negatively-doped elements, and an encapsulating material may be provided to hold the elements in place during the smoothing process.
The invention also relates to a system for aligning elements of a thermoelectric cooler device. The system includes a first support structure adapted to support a plurality of first elements, a second support structure adapted to support a plurality of second elements, a holding structure for positioning the first elements on the first support structure, and a source of encapsulating material for encapsulating the elements.
According to an aspect of the invention, a holding structure is used to hold the positively-doped elements and another holding structure is used to hold the negatively-doped elements. Adhesive support structures may be used to support the elements while they are intermeshed, and the elements are encapsulated in a resin or other flowable material after they are intermeshed. The hardened encapsulant material may be used to hold the intermeshed elements in place while their ends are polished or otherwise mechanically finished.
The invention also provides a method for fabricating a semiconductor device. The method includes the steps of positioning first elements on a first support structure and second elements on a second support structure, intermeshing the first and second elements such that each element contacts each support structure, and subsequently encapsulating the elements within an encapsulating material.
These and other advantages and features of the invention will be more readily understood from the following detailed description of the invention which is provided in connection with the accompanying drawings.
REFERENCES:
patent: 5209786 (1993-05-01), Rolfe et al.
patent: 6329217 (2001-12-01), Watanabe et al.
patent: 6338251 (2002-01-01), Ghosal
Dautartas Mindaugas F.
Freund Joseph M.
Przybylek George J.
Agere Systems Inc.
Geyer Scott B.
Sherry Michael
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