Coded data generation or conversion – Digital code to digital code converters – To or from multi-level codes
Reexamination Certificate
2001-08-24
2003-02-11
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from multi-level codes
C375S286000
Reexamination Certificate
active
06518893
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates generally to data transmission and in particular to data transmission of multilevel encoded data.
BACKGROUND OF THE INVENTION
High-speed serial buses are used in a wide variety of applications, including computer networking, telecommunication systems, and the Internet. With all such applications, the objective is to transport, from one entity to another, as much data as possible, as fast as possible, and as accurately as possible. To help universally adhere to this objective, many standards have been developed. For example, there is a multitude of standards regarding Ethernet. The various standards cover serial transmissions of data at various data rates (e.g., 10 megabits per second, 100 megabits per second, 1 gigabit per second, et cetera) and/or cover various transmission mediums (e.g., twisted copper lines, coaxial cable, and/or fiber optics).
As is known, a serial transmission of data passes one-bit of data per clock cycle, or transmission interval. As the bit rate increases into the multi-gigabit per second range, many issues arise. For instance, high-speed low-jitter clock circuits are difficult to design, and, as such, costly to develop and manufacture. The same is true for data recovery circuits. Another issue for multi-gigabit per second transmission concepts is that when transmitted over copper wires and/or traces, the transmission distance is limited due to the transmission line characteristics of the copper wire and/or traces.
As an alternative to high-speed serial buses, one could use a parallel bus, which transmits several bits of data over several lines from one entity to another in a single clock cycle, or transmission interval. As such, the clock rate can be reduced for parallel bus transmissions, in comparison to serial bus transmissions, while maintaining the same data throughput at the cost of extra lines and extra power consumption. As is known, each line in a parallel bus must be driven to mitigate the transmission line effects. As such, each additional line in a parallel bus increases power consumption over a serial bus.
Another alternative to a traditional high-speed serial bus is to transport multilevel encoded data over the high-speed serial bus. As is known, multilevel encoding uses various voltage levels to indicate the value of data being currently transmitted. For example, four different voltage levels can be used to represent two bits of information. For example, one level may be used to represent the digital value 00, a 2
nd
level to represent the digital value 01, a 3
rd
level to represent the digital value 10, and a 4
th
level to represent the digital value of 11.
For accuracy of transmission, the difference between each of the levels should be significant enough to readily distinguish them apart at the receiving end. As is known, the multilevel encoded data will be somewhat distorted as a result of the transmission characteristics of the path it traverses to reach the receiving end. If, as a result of the distortion, the receiving end cannot accurately distinguish the different voltage levels of the multilevel encoded data, the data cannot be accurately recaptured. Intuitively, the more levels of encoding used, the more difficult it is to accurately recover the data. Thus, multilevel encoding many not be usable in some applications, and in most of the applications it is usable, only a four level encoding scheme is employed.
The use of multilevel encoding is further complicated by the ever-increasing improvements in integrated circuit manufacturing processes, which restrict the normal “thin-oxide” transistors in the process to be powered by smaller and smaller voltages. (Slower “thicker-oxide” transitors may still be powered by larger voltages.) Currently, 0.10 micron CMOS technology restricts the fast thin-oxide transistors in integrated circuits to be powered from a voltage supply of approximately 1 volt. If this voltage were used for a 4 level multilevel encoding scheme, each level is distinguishable by only 250 millivolts at the transmission end and less at the receiving end. This differential value would be halved for 8 level encoding. As such, providing multilevel encoding in integrated circuits is an ever-increasing challenge and currently is impractical to do for many applications.
Therefore, a need exists for a method and apparatus for effective multilevel encoding within integrated circuits.
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Chan H. C.
Garlick & Harrison
Markison Timothy W.
Williams Howard L.
Xilinx , Inc.
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