Microelectronic packaging methods and components

Etching a substrate: processes – Adhesive or autogenous bonding of two or more...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C216S020000, C216S036000, C257S774000, C438S689000

Reexamination Certificate

active

06572781

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to microelectronic packaging and more particularly relates to connection components and methods for packaging microelectronic elements such as semiconductor chips, wafers, and other elements.
As illustrated in certain preferred embodiments of U.S. Pat. No. 5,518,964 (“the '964 patent”) movable interconnections between a microelectronic elements such as a semiconductor chip or wafer and another element can be provided by providing a connection component incorporating a dielectric body and leads extending on the bottom surface of the dielectric body. The leads may have first or fixed ends permanently attached to the dielectric body and connected to electrically conducted features such as terminals, traces or the like on the dielectric body. The leads also may have second or tip ends releasably attached to the dielectric body. The dielectric body, with the leads thereon, may be juxtaposed with the microelectronic element and the second or tip ends of the leads may be bonded to contacts on the microelectronic element. After bonding, the dielectric body and the microelectronic element are moved away from one another, thereby deforming the leads to a vertically extensive disposition. A curable liquid material may be introduced between the dielectric body and the microelectronic element during or after the moving step and cured to form a compliant dielectric layer as, for example, an elastomer or a gel surrounding the leads.
The resulting packaged microelectronic element has terminals on the dielectric body of the connection component which are electrically connected to the contacts on the chip but which can move relative to microelectronic element so as to compensate for thermal effects. For example, a semiconductor chip packaged in this manner may be mounted to a circuit board by solder-bonding the terminals to conductive features of the circuit board. Relative movement between the circuit board and the chip due to thermal effects is taken up in the movable interconnection provided by the leads and the compliant layer. Many variations of these processes and structures are disclosed in the '964 patent and the entire disclosure of such patent is incorporated herein by reference. Merely by way of example, the package-forming process can be conducted on a wafer level, so that numerous semiconductor chips in unitary wafer are connected to connection components in one operation or in one sequence of operations.
Additional variations and improvements of the process taught in the '964 patent are disclosed in commonly assigned U.S. Pat. Nos. 5,578,286; 5,830,782; 5,688,716; and 5,913,109 and in co-pending, commonly assigned U.S. patent application Ser. No. 09/271,688, filed Mar. 18, 1999. The disclosures of all of the aforesaid patents and applications are hereby incorporated by reference herein.
As described in certain preferred embodiments of the co-pending, commonly assigned U.S. Pat. No. 6,117,694; U.S. patent application and Ser. No. 09/317,675, filed May 24, 1999, and U.S. Pat. No. 6,228,686, the disclosures of which are also incorporated by reference herein, a connection component may be provided as a sheet of a dielectric material with a main region and with lead regions defined by slots extending through the sheet. Such slots extend partially around each such lead region. For example, where the lead regions are elongated strips, the slots may be formed as an elongated “U” with the base of the “U” disposed at a tip end of the lead and with the open end of the “U” disposed at a fixed end of the lead region. Thus, the lead region remains connected to the main region at the fixed end or open end of the U-shaped slot. Typically, the sheet is positioned on a temporary support before the slots are formed. Each lead region includes one or more electrically conductive strips connected to terminals exposed at a top surface of the main region. After the slots have been formed, the support, with the component therein, is engaged with a microelectronic element such as a chip or wafer so that bottom surface of the sheet faces toward the microelectronic element. The tip ends of the lead regions are bonded to contacts on the chip so as to electrically connect the contacts of the chip to the strips in the lead regions. After bonding, the support, with the main region of the sheet therein, is moved away from the microelectronic element so as to bend the lead regions out of the plane of the sheet and form vertical extensive leads. The support is removed leaving the terminals exposed for connection to another component. A curable liquid may be introduced between the main region of the sheet and the microelectronic element during or after the movement process.
Despite these improvements in the art, still further improvements and variations would be desirable.
SUMMARY OF THE INVENTION
One aspect of the invention provides methods of making a microelectronic assembly. A method according to this aspect of the invention desirably includes the steps of providing a sheet overlying a first element as, for example, an active microelectronic element such as a semiconductor chip or wafer. The sheet has lead regions each having a tip end and a fixed end remote from its tip end. The sheet also has a main region surrounding said tip regions. The lead regions of the sheet include conductive material extending between said tip ends and said fixed ends.
The method desirably further includes connecting the tip ends or the fixed ends of said lead regions to the first element. Then, after the tip ends or the fixed ends have been connected, portions of the sheet adjacent the lead regions are removed so as to leave a plurality of gaps in the sheet partially surrounding each lead region. The gaps are formed so that the fixed ends of the lead regions remain connected to the main region but the tip ends can be displaced relative to the main region.
Where the connecting step is performed so as to connect the tip ends of the lead regions to said first element, the method desirably further includes the step of moving the main region of the sheet and the first element away from one another through a predetermined displacement. In this step, the motion of the main region relative to the first element includes a component of motion in an upward direction, transverse to the plane of the sheet and away from the first element. Thus, the motion of the main region causes bending of the lead regions downwardly from the main region of said sheet. This action forms the lead regions into leads projecting from the main region of said sheet downwardly toward the chip.
Where the connecting step is performed so as to connect the fixed ends of the lead regions to the first element, the method desirably includes the step of moving the tip ends of the leads and the first element away from one another through a predetermined displacement so as to bend the lead regions upwardly from the main region of said sheet and form leads projecting from said main region of the sheet.
Methods according to this aspect of the invention can provide benefits and features similar to those achieved in certain embodiments of the aforementioned U.S. Pat. No. 6,228,686. However, because the gaps in the sheet are not formed until after the sheet is in place on the first element, the positions of the lead ends can be controlled precisely during the process. This facilitates the process of connecting the lead ends to the terminals. Also, there is no need for a temporary support to hold the lead regions in place between the time the gaps are formed and the time the ends of the lead regions are connected to the first element.
In particularly preferred embodiments, the step of providing the sheet includes at least partially forming the sheet in place on said first element. The sheet desirably includes a dielectric layer and a metallic layer, the metallic layer being disposed above the dielectric layer so that the dielectric layer is disposed between the metallic layer and the first element. The metallic

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Microelectronic packaging methods and components does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Microelectronic packaging methods and components, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Microelectronic packaging methods and components will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3120622

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.