Localized electrostatic discharge protection for integrated...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Reexamination Certificate

active

06650165

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to electrical circuits and, more particularly, to electrostatic discharge protection for integrated circuits.
2. Related Art
Electrostatic discharge (ESD) protection is commonly employed to protect electrical circuits and devices. For example, input/output (I/O) pads of integrated circuits generally require ESD protection. For high-frequency applications, the I/O pads require low-capacitance ESD protection devices to reduce capacitive loading and increase the quality factor. However, the low-capacitance requirement forces the use of protection diodes having a smaller junction area, which degrades their ESD performance.
The low-capacitance forward-biased diodes are typically coupled to one large supply voltage (Vcc) ESD clamp diode. However, the metal bus interconnect resistor-capacitor (RC) time delay from the I/O pad to the large supply voltage ESD clamp diode can significantly degrade ESD performance. As a result, there is a need for an improved ESD circuit.
BRIEF SUMMARY OF THE INVENTION
Electrostatic discharge protection systems and methods are disclosed herein. In accordance with some embodiments, localized supply voltage (Vcc) clamps are provided in close proximity to input/output pads to absorb electrostatic discharge energy applied to the input/output pads. The localized supply voltage (Vcc) clamps can be designed to be independent from the main supply voltage (Vcc) electrostatic discharge protection. The localized clamping technique enhances electrostatic discharge protection of low-capacitance input/output protection diodes designed for high-frequency applications.
In accordance with one embodiment of the present invention, an integrated circuit includes an input/output pad, a supply voltage pad, a first diode coupling the input/output pad to the supply voltage pad, a second diode coupling the input/output pad to a ground terminal, and a first transistor coupled to the first diode and to the ground terminal to absorb electrostatic discharge flowing through the input/output pad.
In accordance with another embodiment of the present invention, a method of providing electrostatic discharge protection for an input/output pad of an integrated circuit includes providing a first diode to couple the input/output pad to a supply voltage pad; providing a second diode to couple the input/output pad to a ground terminal; and providing a localized clamping circuit, for the input/output pad, having a first transistor coupled to the supply voltage pad to absorb electrostatic discharge flowing through the input/output pad and the first diode.
The scope of the invention is defined by the claims, which are incorporated into this section by reference. A more complete understanding of embodiments of the present invention will be afforded to those skilled in the art, as well as a realization of additional advantages thereof, by a consideration of the following detailed description of one or more embodiments. Reference will be made to the appended sheets of drawings that will first be described briefly.


REFERENCES:
patent: 5528188 (1996-06-01), Au et al.
patent: 5546038 (1996-08-01), Croft
patent: 5631793 (1997-05-01), Ker et al.
patent: 5959488 (1999-09-01), Lin et al.
patent: 6097235 (2000-08-01), Hsu et al.
patent: 6414532 (2002-07-01), Su et al.
patent: 6469560 (2002-10-01), Chang et al.
patent: 6507471 (2003-01-01), Colclaser et al.
Charvaka Duvvury et al. “Substrate Pump NMOS for ESD Protection Applications”, Silicon Technology Development, Texas Instruments, Dallas, Texas, 11 pages.

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