Pulse or digital communications – Receivers – Interference or noise reduction
Reexamination Certificate
2000-07-10
2003-12-09
Tran, Khai (Department: 2631)
Pulse or digital communications
Receivers
Interference or noise reduction
Reexamination Certificate
active
06661857
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates in general to wireless communication systems, such as but not limited to wireless local area networks (WLANs), and is particularly directed to a new and improved mechanism that may be readily incorporated into the digital processing circuitry of a wireless receiver's decision feedback equalizer, to facilitate processing of a preamble symbol sequence received over a multipath communication channel in order to enable the impulse response of the channel to be rapidly estimated, and thereby set the parameters of the equalizer.
BACKGROUND OF THE INVENTION
The ongoing demand for faster (higher data rate) wireless communication products has been the subject of a number of proposals before the IEEE 802.11 committee, including those involving the use of a standard for the 2.4 GHz portion of the spectrum, which FCC Part 15.247 requires be implemented using spread spectrum techniques that enable intra-packet data rates to exceed 10 Mbps Ethernet speeds. The 802.11 committee's 2.4 GHz standard covers only one and two Mbps data rates, that use either frequency hopping (FH) or direct sequence (DS) spread spectrum (SS) techniques. This FCC requirement for the use of spread spectrum signaling takes advantage of inherent SS properties that make the signals more robust to inadvertent interference—by lowering the average transmit power spectral density, and through receiver techniques which exploit spectral redundancy and thus combat self-interference created by multipath.
The substantially exponentially-decayed Rayleigh fading characteristic of the power delay profile (the variation in mean signal power with respect to its power dispersed across time) of a signal transmitted within an indoor WLAN system results from the relatively large number of reflectors (e.g., walls) within the building between transmitter and receiver, and the propagation loss associated with the respectively later time-of-arrival propagation paths containing (logarithmically) weaker energies. A principal aspect of the exponentially decayed multipath effect is the fact that a signal's propagation delay is proportional to the total distance traveled, so that, on-average, the strongest (minimal obstruction containing) transmission paths are those whose signals are the earliest to arrive at the receiver. In general, for any given transmission, a first to arrive, direct or line-of-sight path from transmitter to receiver may encounter an attenuating medium (such as one or more building walls and the like), while a later arriving signal reflected off a highly reflective surface and encounter no attenuating media may be have a larger amplitude channel impulse response (CIR) than the first-to-arrive signal. On average, however, such occurrences are few in number relative to echo signals which follow the CIR peak.
In terms of a practical application, the root mean squared (RMS) delay spread of a multipath channel may range from 20-50 nsec for small office and home office (SOHO) environments, 50-100 nsec for commercial environments, and 100-200 nsec for factory environments. For exponentially faded channels, the (exponential) decay constant is equal to the RMS delay spread. For relatively low signal bandwidths (less than 1 MHz), fading due to multipath is mostly ‘flat’. However, at bandwidths above 1 MHz, for example at the 10 MHz bandwidth required by a direct sequence spread spectrum (DSSS) system to attain the above-referenced higher data rate of 10 Mbps, fading becomes selective with frequency, constituting a serious impediment to reliable communications over a multipath channel. Thus, multipath distortion within a WLAN environment can cause severe propagation loss over the ISM band.
One approach to counter this multipath distortion problem is to use a channel-matched correlation receiver, commonly referred to as a ‘RAKE’ receiver, which employs a DSSS structure having a transmitted bandwidth wider than the information bandwidth. In a DSSS signal structure, a respective codeword is formed of a sequence of PN code ‘chips’, which may be transmitted using a relatively simple modulation scheme such as BPSK or QPSK, and codeword chips may be fixed as in a signature sequence, or they may be pseudo random. In addition, phase modulation of a codeword may be used to convey information.
As diagrammatically illustrated in
FIG. 1
, in a DSSS (RAKE) receiver, the (spread) signal is received and digitized by an RF front end
10
and associated A-D converter
12
, and then coupled to a multipath effect compensation device
14
, which may be implemented using a decision feedback equalizer (DFE) within the signal path through a codeword correlator and coherent multipath combiner. The taps of the DFE
14
are established by a channel impulse response (CIR) estimation processor
16
, which is typically programmed to solve a set of linear equations, parameters for which are derived from a training preamble sequence transmitted prior to commencement of an actual data transmission session. The output of the DFE is coupled to downstream circuitry
18
, such as a peak or largest value detector, to derive the transmitted codeword. The performance of the CIR estimation processor
16
is limited by the fact that the channel estimate can only be as long as the spreading sequence, and the fact that no spreading sequence has perfect autocorrelation properties (no sidelobes and a non-zero main lobe). Thus, the challenge is to arrive at a reasonably ‘good quality’ estimate of the channel (whose length is initially unknown) within a relatively brief period of time (or dwell interval).
SUMMARY OF THE INVENTION
Pursuant to the present invention, this objective is successfully achieved by a new and improved signal processing mechanism executed by the decision feedback equalizer's associated channel estimate processor, which is operative to reduce the ‘wait’ time required to obtain sufficient data symbol estimates to obtain a reasonably accurate estimate of the channel impulse response. For this purpose, in the course of processing received symbols of the preamble sequence, selected estimates of one or more received preamble symbols within a plurality of successive data symbols are repeated in order to generate a longer sequence of preamble symbol estimates.
The ability to repeat a data symbol as the next data symbol in the sequence for the purpose of estimating the behavior of the channel is due to the fact that it can be reasonably expected that the manner in which the channel affects any particular portion of the transmitted energy will similarly affect an immediately adjacent portion of the energy. Hence, two or more immediately adjacent symbols can be expected to exhibit a similar influence of the channel, allowing a received data symbol to be repeated as a ‘pseudo’ symbol value for the next symbol time. The processor then employs this longer sequence of data symbol values, to solve an associated set of linear equations for estimating the channel impulse response (CIR).
In accordance with a preferred embodiment, as a plurality or block of successively received preamble data symbol values are received and stored, one or more of the most recent values of that block of successive symbol values are repeated to create one or more ‘pseudo’ symbols at the front end portion of the next block of successive preamble symbols. This repeated use of a selected number of symbol values of an already received preamble symbol block allows the data symbol values of the next block to be populated within a shorter time than would be required, were the processor to wait for all preamble symbols of the next block to be received.
For the solving a system of eight linear equations to estimate the channel, as a reduced complexity non-limiting illustrative example, with a block length of four symbols, and a single symbol repeat or overlap between blocks, repeating the last (fourth) symbol of a first block as the first symbol of the next successive block means that it is only necessary to receive a reduced number
Baldwin Keith R.
Nelson George R.
Webster Mark A.
Intersil America's Inc.
Stanford Gary R
Tran Khai
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