Method for structuring transparent electrode layers

Electric heating – Metal heating – By arc

Reexamination Certificate

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Reexamination Certificate

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06576866

ABSTRACT:

RELATED APPLICATIONS
This application claims the benefit under 35 U.S.C. §365(c) of PCT International application PCT/EP99/06905 filed Sep. 17, 1999, designating the United States of America and published under PCT Article 21(2) in German, of which this application is a national stage filing under 35 U.S.C. §371.
Foreign priority benefits are claimed under 35 U.S.C. §119(a)-(d) or 35 U.S.C. §365(b) of German application number 19842679.8, filed Sep. 17, 1998.
DESCRIPTION
The present invention relates to a method for patterning transparent conductive layers, more particularly a method for patterning transparent electrode layers in thin-film components.
The fabrication of thin-film components such as, for example, photovoltaic modules, flat screens or switchable windows as find wide application in large-surface electronics requires, in addition to suitable methods of coating also low-cost patterning methods. The thin-film components are deposited as a rule full-surface by known deposition methods and subsequently patterned in making use of suitable patterning processes by removing defined and spatially sharply restricted areas.
Thin-film patterning is needed, for example, in integrated series circuiting of photovoltaic modules. It is known to produce such modules by depositing substantially three functional layers. A first layer is deposited, for example, by vapor deposition on a substrate and serves as the first electrode layer. Deposited on this first electrode layer is an absorber layer consisting of a correspondingly doped semiconductor. In a further step a second electrode layer is then vapor deposited on the absorber layer. This second electrode is generally transparent to radiation in the visible spectral range to ensure low attenuation of the incident sunlight where a solar module is concerned. To protect it from the environment this thin-film structure may be plastics potted and optionally sealed with a second plate.
To make for better exploitation of the complete surface area of the module in the fabrication of such thin-film components or for series-circuited solar modules to boost the total module voltage from less than 1 V per single cell to 12V or 24V of a module, the total surface area of the module is divided up into a plurality of single cells. This requires patterning the various functional layers. Series-circuiting typically comprises at least three steps in patterning the first electrode layer, the absorber layer and the second electrode layer.
It is important in this respect that the patterning technology is cost-effective, i.e. that patterning is implemented with a high throughput and low downtime. In addition, the patterning method employed needs to produce narrow patterning widths to minimize the loss in active module surface area. Apart from this, patterning must not result in any damage or contamination of adjoining or underlying semiconductor or electrode layers, i.e. the selectivity of the patterning process needs to be as high as possible.
In known patterning methods patterning the first electrode layer as firstly deposited and the subsequently deposited absorber layer is done with the aid of excimer or Nd:YAG lasers. For patterning the transparent electrode layer photolithographic patterning methods or etching, machining and mechanical patterning methods are employed. These known methods have several disadvantages, however. Photolithographic patterning is usually expensive and a plurality of steps in the process is needed to implement patterning as desired. In the known machining methods the surface areas to be machined in a later step in the process are coated by silk-screening or paste scribing which likewise involves a plurality of steps in the process (e.g. paste writing and subsequent removal). Apart from this, the patterning width can hardly be reduced to less than 100 &mgr;m. The latter applies also to mechanical patterning which although resulting in no thermal stress, also removes soft underlying layers, however, thus failing to assure the required selectivity within the layered structure. An additional problem is the loosening or detachment of the layer portions adjoining the patterning line which may result in the layer becoming totally detached and problems as regards the stability of the module when subjected to cyclic thermal stress.
Accordingly, the known methods for patterning transparent electrode layers suffer from the disadvantage that they fail to provide sufficient selectivity, do not permit achieving an adequately small patterning width and in addition, are usually associated with high costs.
It is thus the object of the present invention to provide a method for patterning transparent layers which ensures a low patterning width, is flexible as regards the patterning layout, features high reproducibility and clean processing whilst being cost-effective.
This object is achieved by a method having the features as set forth in claim
1
.
Further advantageous aspects read from the sub-claims.
The gist of the invention is to beam the laser energy of a laser for patterning a transparent layer efficiently and exclusively into the transparent layer and it being neither reflected nor transmitted by the underlying layer so as to cause no thermal damage to the underlying layer. This requirement is satisfied by selecting the laser wavelength so that it falls in the range of the plasma absorption of the transparent layer.


REFERENCES:
patent: 4776335 (1988-10-01), Nakanishi et al.
patent: 5475197 (1995-12-01), Wrobel et al.
patent: 5520679 (1996-05-01), Lin
patent: 5607601 (1997-03-01), Loper et al.
patent: 6066830 (2000-05-01), Cline et al.
patent: 0213910 (1987-03-01), None
patent: 0536431 (1993-04-01), None
patent: 0763858 (1997-03-01), None
S. Nakano, et al.: “Laser patterning method for integrated type a-Si solar cell submodules”, XP-002127544, Japanese Journal of Applied Physics, vol. 25, No. 12, Dec. 1986, pp. 1936-1943.
K. L. Chopra, S. Major and D.K. Pandya, Thin Solid Films, “Transparent Conductors—A Status Review”, 2194 Thin Solid Films, vol. 102 (1983) pp. 1-46.

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