Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2001-09-04
2003-07-01
Lebentritt, Michael S. (Department: 2824)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S111000, C438S112000, C438S115000, C438S117000
Reexamination Certificate
active
06586274
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, a substrate for a semiconductor device, a method of manufacture thereof, and an electronic instrument.
2. Description of Related Art
With increasingly high functionality of semiconductor devices, there is a demand for higher pin count and more compactness, for which purpose Ball Grid Array (BGA) types and Chip Size/Scale Package (CSP) types of package have received attention. These packages have a wiring pattern and external terminals formed on a substrate, and a semiconductor chip is bonded to the wiring pattern, and sealed with resin.
Conventionally, a substrate used in these packages is formed of resin, as a result of which there are problems of inadequate flatness and heat dispersion. If the flatness is inadequate, faulty mounting on a mounting substrate may occur, and if the heat dispersion is inadequate the performance as a semiconductor device may be impaired. Therefore, a stiffener is adhered to the substrate for the purpose of ensuring flatness, and to assist heat dispersion a heat spreader is adhered.
Therefore, a package using the substrate commonly requires a stiffener and a heat spreader, and so there is the problem that the manufacturing cost is increased.
It should be noted that if a metallic substrate is used, the problems of flatness and heat dispersion are eliminated. However, with a metallic substrate, if the wiring pattern and external terminals are formed on opposite sides, it is difficult to achieve electrical insulation. That is to say, the wiring pattern and the external terminals are electrically connected through through holes formed in the substrate, and with a metallic substrate it is difficult to achieve electrical insulation within the through holes.
SUMMARY OF THE INVENTION
The present invention is made in consideration of these problems, and has as its object the provision of a semiconductor device, a substrate for a semiconductor device, a method of manufacture thereof, and an electronic instrument, such that a substrate of excellent flatness and heat dispersion is used, and moreover the manufacturing cost can be kept down.
(1) According to a first aspect of the present invention, there is provided a semiconductor device comprising:
a substrate for a semiconductor device, wherein the substrate includes a core layer formed of a metal that promotes heat dispersion, a through hole formation portion formed in the core layer, a plurality of through holes formed in the through hole formation portion, insulating layers formed on both sides of the core layer, and wires formed on the insulating layer and achieving electrical conductivity through the through holes from one surface to the other of the core layer; and
a semiconductor chip provided on the substrate for a semiconductor device, and having electrodes electrically connected to the wires.
The flatness and heat dispersion of the substrate are ensured by the core layer. The wires electrically connecting both sides of the core layer are formed in through holes in the through hole formation portion, which is of a distinct material from the core layer, and therefore electrical insulation of the wires and core layer can be achieved. In this aspect of the present invention, as a metal promoting the dispersion of heat can be used a metal having a high thermal conductivity and a certain surface area.
(2) An opening may be formed in the core layer, and the through hole formation portion may be formed by filling this opening with an insulating material, and the through holes may be formed in this insulating material.
Since the area of the insulating material is defined by the opening, the through hole formation portion can be easily formed.
(3) As the insulating material may be used a resin.
(4) The opening may be formed in at least one of a peripheral portion and a central portion of the core layer.
In this way, there is no particular restriction on the position of the opening.
(5) The semiconductor chip may be disposed on the central portion of the core layer and may be also mounted over at least one of the through holes.
By the formation of the through holes under the semiconductor chip, a large number of through holes can be formed.
(6) The semiconductor chip may be mounted over the through hole through an adhesive. In this case, the function of air escape is facilitated by the through holes.
(7) As the adhesive may be used a thermally conductive material. In this case, heat transmitted from the adhesive is cooled in the through holes. (8) The through holes may be disposed in zigzag.
This makes it possible to form a large number of through holes, and the demand for high pin count can be met.
(9) The opening may be formed on the peripheral portion of the core layer along the edge of the core layer, with an opening length longer close to the peripheral portion than close to the central portion of the core layer. The through holes may be arranged in zigzag on a plurality of phantom lines that are imagined to be over the opening and to extend parallel to a longitudinal direction of the opening. The number of the through holes arranged on one of the phantom lines that is close to the edge of the core layer may be larger than the number of the through holes arranged on one of the phantom lines that is close to the central portion of the core layer.
By means of this, the opening can be formed with an opening length longer close to the periphery than close to the center region of the core layer. Therefore, a larger number of through holes can be formed in the opening close to the periphery of the core layer than close to the center of the core layer. Since the through holes are arranged in zigzag, wiring can be carried out easily. By disposing the through holes in zigzag, a large number of through holes can be formed, and as a result the demand for high pin count can be met.
(10) The wires may include inner leads extending from the through holes toward the central portion of the core layer, and connected to electrodes of the semiconductor chip.
Since the inner leads are drawn out from the zigzag through holes, the inner leads drawn out from the through holes formed close to the periphery of the core layer in the opening are made easier to avoid the through holes formed close to the center of the core layer.
(11) According to a second aspect of the present invention, there is provided a substrate for a semiconductor device, comprising:
a core layer formed of a metal that promotes heat dispersion;
a through hole formation portion formed in a part of the core layer;
a plurality of through holes formed in the through hole formation portion;
insulating layers formed on both sides of the core layer; and
wires formed on the insulating layers and achieving electrical conductivity through the through holes from one surface to the other of the core layer.
According to this aspect of the present invention, the flatness and heat dispersion of the substrate are ensured by the core layer, and by virtue of the formation of the through holes in the through hole formation portion that is of a distinct material from the core layer, electrical insulation of the wires and core layer can be achieved. In this aspect of the invention, as a metal promoting heat dispersion can be used a metal having a high thermal conductivity and a certain surface area.
(12) An opening may be formed in the core layer, and the through hole formation portion may be formed by filling this opening with an insulating material, and the through holes may be formed in this insulating material.
Since the area of the insulating material is defined by the opening, the through hole formation portion can be easily formed.
(13) As the insulating material may be used a resin.
(14) The opening may be formed in at least one of a peripheral portion and a central portion of the core layer.
In this way, there is no particular restriction on the position of the opening.
(15) The through holes may be disposed in zigzag.
Since a large number of through holes can
Lebentritt Michael S.
Oliff & Berridge PLC.
Seiko Epson Corporation
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