Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Reexamination Certificate
2002-02-06
2003-09-23
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
C257S072000, C257S344000, C257S350000, C257S408000
Reexamination Certificate
active
06624443
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a display device, and more particularly, to an active matrix type display device and a method of manufacture thereof.
In a typical liquid crystal display device, on a liquid-crystal-side surface of one of a pair of transparent substrates, which are arranged to face each other in an opposed manner with a liquid crystal material disposed therebetween, gate signal lines extend in the x direction and are arranged in parallel in the y direction and drain signal lines extend in the y direction and are arranged in parallel in the x direction, and respective regions surrounded by these signal lines define pixel regions.
On each pixel region, there is at least a thin film transistor, which is operated in response to scanning signals from a one-side gate signal line and a pixel electrode to which video signals are supplied from a one-side drain signal line through the thin film transistor. The pixel electrode generates an electric field between the pixel electrode and a counter electrode thus controlling the light transmittivity of the liquid crystal material. Further, as the thin film transistor, a transistor has been employed which uses a semiconductor layer which is referred to as a so-called a low-temperature polysilicon (p-Si) layer. Such a thin film transistor can be formed by a low temperature process at a temperature of not more than approximately 450° C.
There is a known liquid crystal display device in which a scanning driving circuit, which supplies scanning signals to the gate signal lines, and a video driving circuit, which supplies video signals to the drain signal lines, are formed on one of the above-mentioned substrates. Each driving circuit is comprised of a large number of complementary MIS transistors, because these MIS transistors can be formed along with the formation of the above-mentioned thin film transistors. As the constitution of such thin film transistors, the constitution which is disclosed in Japanese Laid-open Patent publication 163366/1999 has been known, for example.
With respect to a thin film transistor having such a constitution, so-called LDD (Lightly Doped Drain) regions are formed respectively between a channel region thereof and drain and source regions, which are formed at both sides of the channel region, and the widths of respective LDD regions are made uniform so as to make the magnitude of ON currents uniform.
These LDD regions are regions which are doped with an impurity having a concentration lower than the concentration of the impurity doped into the drain and source regions. The LDD regions are formed to alleviate the concentration of an electric field at these portions.
However, with respect to such a thin film transistor, no consideration has been given to the film thickness of an insulation film (functioning as a gate insulation film) which covers a channel region, an LDD region and the drain and source regions thereof Accordingly, it has been pointed out that the areas of the tapered surfaces of contact holes cannot be reduced, so that the numerical aperture cannot be enhanced, or there arises a defect with respect to the coating ability of an interlayer insulation film due to the formation of a stepped portion in the periphery of a gate electrode of the thin film transistor.
The present invention has been made in view of such circumstances as described above, and it is an object of the present invention to provide a display device which can enhance the numerical aperture and can resolve defects which occur in a periphery of a gate electrode of a thin film transistor.
Further, it is another object of the present invention to provide a method of fabricating a display device which can reduce the voltage necessary for ion implantation of an impurity at the time of forming the thin film transistors.
SUMMARY OF THE INVENTION
A summary of typical examples of the invention described in this specification will be presented.
That is, a display device according to the present invention is characterized in that, for example, a thin film transistor is formed in pixel regions over at least one of a pair of substrates, which are arranged to face each other in an opposed manner with a liquid crystal material being disposed therebetween. Each thin film transistor includes a semiconductor layer made of polysilicon, which is comprised of a channel region, drain and source regions arranged at both sides of the channel region and doped with an impurity of high concentration, and at least an LDD region arranged between the drain region and the channel region and between the source region and the channel region, or between the drain region and the channel region, and doped with impurity of low concentration; an insulation film which is formed over an upper surface of the semiconductor layer and respectively sequentially decreases in film thickness thereof in a step-like manner as the insulation film is extended to the channel region, the LDD region, the drain and the source region or the drain region; and a gate electrode which is formed over the channel region through the insulation film.
In a display device having such a constitution, the film thickness of the insulation film on the drain and source regions can be made smaller than the film thickness of the insulation film on the channel region.
Accordingly, the tapered areas in the contact holes of the insulation film, which are formed for drain and source electrodes, can be reduced so that the areas of the respective electrodes can be reduced. Accordingly, the numerical aperture can be enhanced.
Further, since the insulation film can be made by stepped portions thereof divided in two stages in the course of reaching the drain and source regions from the channel region, substantially smooth oblique surfaces can be formed so that the drawbacks derived from the stepped portions can be resolved.
Further, a method of fabricating a display device according to the present invention is characterized in that, for example, a thin film transistor is formed over an insulation substrate through the following steps, comprising a step in which a semiconductor layer made of polysilicon, an insulation film and a conductive layer are formed over the substrate side; a step which uses the conductive film which remains on a channel region and an LDD region and performs ion plantation of an impurity of high concentration using the remaining conductive layer as a mask; and a step which uses the conductive film which remains on the channel region and performs ion plantation of an impurity of low concentration using the remaining conductive layer as a mask. A resist film, which is used for patterning the conductive layer, which is allowed to remain on the channel region, is formed of a portion obtained by removing a periphery of the resist film which is used for patterning the conductive layer that remains on the channel region and the LDD region, and at the time of making the conductive film that remains on the channel region and the LDD region and also on the channel region, by using the conductive film as a mask, a surface of the insulation film which is exposed from the mask is slightly etched.
In the method for fabricating the display device having such a constitution, at the time of performing ion implantation of the impurity of high concentration and ion implantation of the impurity of low concentration, respectively, the film thickness of the insulation film which constitutes a through film is made smaller than the film thickness of the insulation film formed over the channel region; and, hence, the voltage necessary for ion implantation can be reduced, so that damage to the insulation film can be minimized.
REFERENCES:
patent: 5412493 (1995-05-01), Kunii et al.
patent: 5736751 (1998-04-01), Mano et al.
patent: 5962916 (1999-10-01), Nakanishi et al.
patent: 6365936 (2002-04-01), Shimabukuro et al.
patent: 6384427 (2002-05-01), Yamazaki et al.
Kimura Yasukazu
Kurita Masaaki
Nakamura Takao
Ohkura Makoto
Shimomura Shigeo
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Ngo Ngan V.
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