Variable voltage threshold ESD protection

Dynamic magnetic information storage or retrieval – Head – Magnetoresistive reproducing head

Reexamination Certificate

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Reexamination Certificate

active

06552879

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to devices for ESD protection of sensitive thin film components and, more particularly, to ESD protection devices for thin film magnetic transducers.
BACKGROUND OF THE INVENTION
For ESD applications in general, the ESD protection schemes need a fixed voltage threshold and a current sink capacity appropriate to the application. Conventional ESD protection has typically used diodes and diode-like circuits. One important limitation of diode based implementations is the minimum turn-on voltage. As thin film magnetic transducers (heads) are made smaller and more sensitive, their susceptibility to ESD damage has increased and the voltage at which damage may occur has continued to fall. For example, the family of heads using magnetoresistive sensors early in their development had a failure voltage of approximately 2 volts. That number has dropped below 1 volt and can reasonably be expected to continue to fall. For magnetic heads and other similar thin film devices, the turn-on voltage limitation of diodes poses a significant problem for low voltage ESD protection. Although fixed voltage devices may be adequate for many applications, a more flexible solution would have a variable threshold.
The prior art has typically taught straightforward protection schemes for magnetic transducers. For example, U.S. Pat. No. 5,903,415 to Gill describes the use of an asymmetric diode network in parallel with a spin valve sensor in a magnetic transducer. To provide for a lower voltage threshold in one direction, he suggests using a single diode while using two diodes in series in the other direction. U.S. Pat. No. 5,587,857 to Voldman, et al., describes the use of diodes or FETs for ESD protection of magnetic transducers. In particular, Voldman describes the use of a parallel connected pair of FETs which have their gates shorted to opposite end nodes of the pair.
In applications other than ESD protection, it is known in the art that the threshold voltage of various transistor types, particularly MOSFETs, is affected by the voltage level of the substrate or body. This is variously called the “body effect” or “substrate bias effect.” Typically the body effect is considered undesirably and efforts are made to negate it, but there have cases where the effect was used to achieve a desired result. For example, in U.S. Pat. No. 6,040,610 to Noguchi, et al., the body effect is used to lower the turn-on voltage when the power supply voltage drops. Noguchi, et al., describe the use of a bias voltage generator connected to a “body electrode” to lower the turn-on voltage when needed. Similarly, U.S. Pat. No. 4,384,300 to Iizuka uses the effect to implement a negative resistance device.
SUMMARY OF THE INVENTION
The invention provides an ESD protective circuit with low capacitance and a very low, variable turn-on threshold by using a shunting MOSFET which has an isolated substrate/body which is connected to an electrode that is provided in addition to the typical gate, source and drain electrodes. A gate voltage which is preferably a function of an ESD voltage is used to trigger the MOSFET into conduction. Preferably a variable voltage is applied to the substrate/body of the MOSFET to lower the turn-on voltage when an ESD event occurs. The variable voltage on the substrate/body allows the turn-on voltage to be adjusted for different applications and/or to be adjusted dynamically to respond to events. The substrate/body voltage is also preferably derived from the ESD voltage.
The source and drain of the MOSFET are connected across the leads of the magnetic sensor element to be protected, i.e., in parallel with the sensor. Since the MOSFET can turn-on with a negative or positive voltage, the selection of appropriate gate and substrate/body control circuits will provide protection for positive and negative ESD events. When operating in the standby state, the voltages are set to achieve low capacitance, low current flow and prevent unwanted turn-on.
In a preferred embodiment the MOSFET additionally has an isolated epitaxial region and a subcollector with separate electrodes. The epitaxial electrode is shorted to the gate electrode. During an ESD event a high voltage on the epitaxial electrode lowers the turn-on threshold through a “reverse body effect.” The subcollector electrode can be shorted to the substrate/body electrode to enhance the turn-on threshold lowering effect.


REFERENCES:
patent: 4384300 (1983-05-01), Iizuka
patent: 5545572 (1996-08-01), Lee et al.
patent: 5587857 (1996-12-01), Voldman et al.
patent: 5771571 (1998-06-01), Voldman et al.
patent: 5808346 (1998-09-01), Ueda
patent: 5811857 (1998-09-01), Assaderaghi
patent: 5903415 (1999-05-01), Gill
patent: 5946573 (1999-08-01), Hsu
patent: 6015993 (2000-01-01), Voldman et al.
patent: 6040610 (2000-03-01), Noguchi et al.
patent: 6049110 (2000-04-01), Koh
patent: 6118155 (2000-09-01), Voldman et al.
patent: 6157530 (2000-12-01), Pequignot et al.
patent: 6359750 (2002-03-01), Hughbanks et al.

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