Double-packaged multichip semiconductor module

Details Double-packaged multichip semiconductor module Double-packaged multichip semiconductor module

1996-05-17

2003-04-29

Graybill, David E. (Department: 2827)

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

C438S017000, C438S109000

Reexamination Certificate

active

06555399

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the field of semiconductors, a type of multi-chip module.
BACKGROUND OF THE INVENTION
Many types of semiconductor devices are made using similar manufacturing procedures. A starting substrate, usually a thin wafer of silicon, is doped, masked, and etched through several process steps, the steps depending on the type of devices being manufactured. This process yields a number of die on each wafer produced. Each die on the wafer is given a brief test for functionality, and the nonfunctional die are mechanically marked or mapped in software. This brief test is only a gross measure of functionality, and does not insure that a die is completely functional or has specifications that would warrant its assembly in a package.
If the wafer has a yield of grossly functional die which indicates that a good quantity of die from the wafer are likely to be fully operative, the die are separated with a die saw, and the nonfunctional die are scrapped while the rest are individually encapsulated in plastic packages or mounted in ceramic packages with one die in each package. After the die are packaged they are rigorously tested. Components which are shown to be nonfunctional or which operate at questionable specifications are scrapped or devoted to special uses.
Packaging unusable die only to scrap them after testing is costly. Given the relatively low profit margins of commodity semiconductor components such as dynamic random access memories (DRAMs) and static random access memories (SRAMs), this practice would seem especially wasteful. However, no thorough and cost effective method of testing an unpackaged die is available which would prevent this unnecessary packaging of nonfunctional and marginally functional die.
The practice of packaging die only to find the component must be scrapped can especially affect yields on multi-chip modules (MCMs). With MCMs, several unpackaged die are assembled into a single component, then the component is tested as a single functional unit. If a single die is nonfunctional or operates outside of acceptable specifications, the entire component fails and all die in the package are scrapped or an attempt is made to “re-work” the MCM. There is presently no cost-effective way to reclaim the functioning die. Statistically, the yields of MCMs decrease in proportion to the increasing number of die in each module. The highest density modules have the lowest yields due to their increased total silicon surface area.
SUMMARY OF THE INVENTION
An object of this invention is to provide a MCM which has a higher probability of receiving only good die as compared with present MCMs of equal density. This produces a higher yield.
This and other objects of the present invention are accomplished by packaging each die individually, for example in a thin small outline package (TSOP), testing the components including use of burn-in to eliminate “infant mortality” failing, then assembling a number of functional packaged components together in a single multi-chip module.


REFERENCES:
patent: 4080026 (1978-03-01), Gianni
patent: 4398235 (1983-08-01), Lutz
patent: 4437235 (1984-03-01), McIver
patent: 4640436 (1987-02-01), Miyoshi et al.
patent: 4663833 (1987-05-01), Tanaka et al.
patent: 4682207 (1987-07-01), Akasaki et al.
patent: 4709122 (1987-11-01), Samuels
patent: 4727410 (1988-02-01), Higgins, III
patent: 4746583 (1988-05-01), Falanga
patent: H606 (1989-03-01), Ahn et al.
patent: 4873615 (1989-10-01), Grabbe
patent: 4894706 (1990-01-01), Sato et al.
patent: 4901136 (1990-02-01), Neugebauer et al.
patent: 4943844 (1990-07-01), Oscilowski et al.
patent: 4953005 (1990-08-01), Carlson et al.
patent: 4982265 (1991-01-01), Watanabe et al.
patent: 4992850 (1991-02-01), Corbett et al.
patent: 4996587 (1991-02-01), Hinrichsmeyer et al.
patent: 5008734 (1991-04-01), Dutta et al.
patent: 5010445 (1991-04-01), Weinold
patent: 5028986 (1991-07-01), Sugano et al.
patent: 5036381 (1991-07-01), Lin
patent: 5070258 (1991-12-01), Izumi et al.
patent: 5089929 (1992-02-01), Hilland
patent: 5138438 (1992-08-01), Masayuki
patent: 5155067 (1992-10-01), Wood et al.
patent: 5165067 (1992-11-01), Wakefield et al.
patent: 5227664 (1993-07-01), Toshio et al.
patent: 5304738 (1994-04-01), Long
patent: 5394608 (1995-03-01), Tottori et al.
patent: 5420751 (1995-05-01), Burns
patent: 5446620 (1995-08-01), Burns et al.
patent: 341504 (1989-11-01), None
patent: 2185850 (1929-07-01), None
patent: 52-75981 (1977-06-01), None
patent: 58-111166 (1983-09-01), None
patent: 61-24253 (1986-02-01), None
patent: 2-198148 (1990-08-01), None

Affiliated with

Also associated with

Rating

Double-packaged multichip semiconductor module does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Double-packaged multichip semiconductor module, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Double-packaged multichip semiconductor module will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3081615