Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2001-02-21
2003-01-07
Vu, Bao Q. (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S288000, C363S060000, C307S110000
Reexamination Certificate
active
06504349
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to a circuit that provides a regulated output voltage and more specifically to a circuit that uses a pulse width modulated technique to generate the regulated output voltage.
BACKGROUND OF THE INVENTION
Many electronic applications of today require the use of circuits capable of providing a stable output voltage given a range of input voltages. Devices such as cellular telephones and personal digital assistants typically receive their power from a supply battery. As the device operates, battery power is consumed and the battery voltage changes. Consequently, if the supply voltage is not regulated, the supply voltage and hence the performance of the device can also change over time.
DC-DC converters used to provide regulated voltage typically implement a fixed voltage gain stage and apply pulse frequency modulation (PFM) or pulse skipping techniques to regulate the voltage at the desired value. The power efficiency of such converters decreases as the voltage generated by the initial boost stage is increased beyond that necessary to provide the desired regulated output voltage. This occurs for example when it is necessary to provide a regulated output voltage of 4.5 volts from a 3.0 volt source and the initial boost stage doubles the input voltage. In this example, a boost gain of 1.5 is preferred unless and until the input voltage decreases to less than 3.0 volts.
SUMMARY OF THE INVENTION
A circuit and method for providing a regulated output voltage has been developed. The circuit includes a capacitor array that receives an input voltage and provides an output voltage across a load capacitor. The load capacitor is discharged by a device consuming power. The output voltage is regulated according to a control signal that modulates the amount of charge transferred from the capacitor array to the load capacitor. During the charge transfer, the output voltage is compared with a reference voltage and a control signal responsive to the comparison is generated to terminate the charge transfer to the load capacitor. Additionally, the capacitor array is able to switch between two or more gain states, depending on the input voltage, to achieve improved efficiency.
By providing the ability to dynamically configure the gain of the capacitor array, the present invention provides a power efficient method for generating a substantially constant output voltage for a wide range of input voltages. As a result, the battery life can be extended in portable electronic devices, such as cellular telephones and personal digital assistants.
In one embodiment of the invention, the circuit includes a capacitor array, a comparator and an output control module. The capacitor array includes a first array input terminal configured to receive a first control signal, a second array input terminal configured to receive a second control signal, a supply voltage terminal that receives a substantially DC voltage, and an array output terminal to provide the regulated output voltage. The capacitor array generates an intermediate signal in response to the first control signal and the substantially DC voltage. The capacitor array also generates the regulated output voltage at the array output terminal in response to the intermediate signal and the second control signal. The comparator includes a first comparator terminal in communication with the array output terminal and a comparator output terminal that provides a comparator signal in response to the regulated output voltage. The output control module includes a first control module input terminal in communication with the first array input terminal, a second control module input terminal in communication with the comparator output terminal, and a control module output terminal in communication with the second array input terminal. The output control module generates the second control signal at the control module output terminal in response to the comparator signal. In one embodiment, the comparator includes a second comparator terminal configured to receive a first reference voltage. The comparator generates the comparator signal in response to the output voltage and the reference voltage.
In one embodiment, the capacitor array is a switched capacitor array. In another embodiment, the invention includes a gain determination module. In this embodiment, the capacitor array includes a gain control terminal that receives a gain control signal. The gain determination module includes a first gain determination input terminal in communication with the supply voltage terminal and a gain determination output terminal in communication with the gain control terminal. The gain determination module generates the gain control signal in response to the substantially DC voltage. In one embodiment, the gain determination module includes a supply voltage comparator and a pump-switches configuration control module. The supply voltage comparator includes a first input terminal in communication with the first gain determination module input terminal and a supply comparator output terminal. The supply comparator generates a supply comparator signal at the supply comparator output terminal in response to the substantially DC input voltage. The pump-switches configuration control module includes a configuration input terminal in communication with the supply comparator output terminal and a configuration output terminal which is the gain determination module output terminal. The pump-switches configuration control module generates the gain control signal at the configuration output terminal in response to the supply comparator signal.
In one embodiment, the circuit includes a capacitor array, an error amplifier and an output control module. The capacitor array includes a first array input terminal configured to receive a first control signal, a second array input terminal configured to receive a second control signal, a supply voltage terminal configured to receive a substantially DC voltage, and an array output terminal to provide the regulated output voltage. The capacitor array generates an intermediate signal in response to the first control signal and the substantially DC voltage. The capacitor array also generates the regulated output voltage at the array output terminal in response to the intermediate signal and the second control signal. The error amplifier includes a first amplifier input terminal in communication with the array output terminal and an amplifier output terminal that provides an error signal in response to the regulated output voltage. The output control module includes a first control module input terminal in communication with the first array input terminal, a second control module input terminal in communication with the amplifier output terminal, and a control module output terminal in communication with the second array input terminal. The output control module generates the second control signal at the control module output terminal in response to the error signal and the first control signal.
In one embodiment, the error amplifier includes a second input terminal configured to receive a first reference voltage. The amplifier generates the error signal in response to the regulated output voltage and the reference voltage. In another embodiment, the circuit includes a filter. In this embodiment, the filter includes an input terminal in communication with the error amplifier output terminal, and a filter output terminal in communication with the second output control module input terminal. The filter generates a filtered error signal at its output terminal in response to the error signal. The output control module generates the second control signal in response to the first control signal and the filtered error signal. In another embodiment, the circuit includes a gain determination module. In this embodiment, the capacitor array includes a gain control terminal that receives a gain control signal. The gain determination module includes a first gain determination input terminal in communication with the su
Sipex Corporation
Testa Hurwitz & Thibeault LLP
Vu Bao Q.
LandOfFree
Pulse width modulated voltage regulation circuit and related... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Pulse width modulated voltage regulation circuit and related..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pulse width modulated voltage regulation circuit and related... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3072152