Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2000-08-10
2003-01-28
Chaudhuri, Olik (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S383000, C257S384000, C257S770000
Reexamination Certificate
active
06512296
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates, in general, to semiconductor device fabrication and, more particularly, to forming silicide structures in the fabrication of semiconductor devices.
BACKGROUND OF THE INVENTION
Semiconductor devices and integrated circuits fabricated on semiconductor substrates often include silicide structures serving as conductive electrodes. In some applications such as, for example, electrostatic discharge protection circuits, input/output drivers, etc., high resistance silicide structures are beneficial. In other applications such as, for example, inverters, low noise amplifiers, etc., low resistance silicide structures are beneficial in improving the circuit performance. To form high resistance titanium silicide structures, titanium is disposed on the semiconductor substrate. The substrate then goes through an annealing process at a temperature not exceeding 700 degrees Celsius (°C.), during which titanium interacts with silicon on the substrate to form silicide in an orthorhombic base centered crystal phase referred to as C49. C49 crystal phase silicide has a resistivity between approximately 60 micro-ohm-centimeter (&mgr;&OHgr;-cm) and approximately 90 &mgr;&OHgr;-cm. Low resistance silicide structures can be formed in several ways. In one approach, the substrate with high resistivity C49 silicide formed thereon is put through a rapid thermal annealing process at a temperature of between 800° C. and 1000° C. The high temperature annealing transforms the titanium silicide from C49 phase to an orthorhombic face centered crystal phase referred to as C54, which has a resistivity between approximately 12 &mgr;&OHgr;-cm and approximately 20 &mgr;&OHgr;-cm. In another approach, the low resistance silicide structures are formed through a refractory metal, e.g., molybdenum, implantation, titanium deposition, and annealing. During the annealing process, the titanium interacts with silicon to form silicide structures in the C54 crystal phase because the molybdenum lowers the barriers for phase transformation from the high resistance C49 crystal phase to the low resistance C54 crystal phase.
In some applications, it is beneficial to have both high and low resistance silicide structures in the same circuit element, or in different circuit elements within the same functional block. It is sometimes also beneficial for process integration to have silicide structures of different characteristics formed on the same semiconductor wafer.
Accordingly, there exists a need for a semiconductor structure that includes heterogeneous silicide structures on a semiconductor substrate and a method or a process for forming such a structure. It is desirable for the process to be simple and efficient. It is also desirable for the process to be compatible with existing semiconductor device fabrication processes.
SUMMARY OF THE INVENTION
A general advantage of the present invention is providing a semiconductor structure that includes heterogeneous silicide structures formed on a semiconductor substrate. Another advantage is providing a simple and efficient process for forming such silicide structures. A particular advantage of the present invention is providing a method for forming silicide structures of different resistivities on a semiconductor substrate. It is a further advantage of the present invention to integrate the heterogeneous silicide formation process into existing device fabrication processes.
These and other advantages of the present invention is achieved through disposing a refractory metal onto selective areas of a semiconductor substrate, depositing a precursory metal over the semiconductor substrate, and annealing the semiconductor substrate at a temperature between approximately 550 degrees Celsius (°C.) and approximately 750° C., preferably between approximately 600° C. and approximately 700° C. During the annealing process, the precursory metal deposited in an area without the refractory metal interacts with silicon on the substrate to form silicide in a high resistivity crystal phase. On the other hand, the precursory metal deposited in an area with the refractory metal interacts with silicon to form silicide in a low resistivity crystal phase because the presence of refractory metal in silicon lowers the barrier of phase transformation from the high resistivity crystal phase to the low resistivity crystal phase. The selective refractory metal disposition can be achieved by covering the areas in which the high resistivity crystal phase silicide is to be formed with photoresist during the refractory metal disposition. The refractory metal disposition can be performed at various stages of semiconductor device fabrication processes, depending on the desired device structures and characteristics.
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Gauthier Jr. Robert J.
Mann Randy W.
Voldman Steven H.
Chaudhuri Olik
International Business Machines - Corporation
Kielin Erik
Schmeiser Olsen & Watts
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