Pseudomorphic high electron mobility transistor power device

Details Pseudomorphic high electron mobility transistor power device Pseudomorphic high electron mobility transistor power device

2002-03-29

2003-07-15

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Field effect transistor

C257S194000, C257S192000, C438S172000

Reexamination Certificate

active

06593603

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a pseudomorphic high electron mobility transistor (PHEMT) power device and a method for manufacturing the same, and more particularly, to a PHEMT power device capable of operating with single voltage supply and a method for manufacturing the same.
2. Description of the Related Art
Recently, the demand for high frequency wireless communications, such as the bluetooth, wireless LAN and the like, tends to abruptly increase. This demand also has increased the need for a power device amplifying a signal to transmit a high radio-frequency (RF) signal. The recent trend to digital wireless communication related technology to increase simultaneous access capacity requires power devices having superior linearity.
Field effect transistors (FETs) for use in the manufacture of high RF power devices include metal-semiconductor field effect transistors (MESFETs), high electron mobility transistors (HEMTs) and the like. Common MESFET and HEMT require a negative pinch-off voltage, so a negative bias source is coupled to the gate for receiving an RF signal. However, the use of a circuit acting as the negative bias source increases the chip manufacturing costs, disadvantageously over heterojunction bipolar transistors using only a positive voltage source.
To drive a MESFET or HEMT device with a single voltage supply, the pinch-off voltage should be increased to apply a positive voltage of 0V or greater to the gate for receiving an RF signal. In this case, the maximum saturation current decreases whereas the leakage current increases, and thus it is unsuitable for power device applications. For a HEMT power device, the carrier concentration is purposely increased to increase the transconductance and thus the power gain. However, the final device has a lowered breakdown voltage and fails to ensure the transconductance consistent with respect to gate voltages, thereby reducing the linearity and power-added efficiency.
To manufacture a pseudomorphic high electron mobility transistor (PHEMT) power device that has excellent linearity and power-added efficiency and is capable of operating with a single voltage supply, the following requirements should be met: a pinch-off voltage (Vp) high enough to supply a positive operating voltage, a low knee voltage (Vk), a high breakdown voltage, a uniform transconductance with respect to gate voltages, a low source-gate capacitance and the like. However, all of these requirements cannot be met according to the electron transit layer structure and doping concentration. Therefore, there is a need to optimize the structure of an epitaxial substrate and device manufacturing conditions to manufacture a PHEMT power device that is capable of operating with a single voltage supply and has excellent linearity and high breakdown voltage.
SUMMARY OF THE INVENTION
It is a first objective of the present invention to provide a pseudomorphic high electron mobility transistor (PHEMT) power device that is capable of operating with a single voltage supply, has excellent linearity and a high breakdown voltage, is suitable for use in high-frequency digital wireless communications, and is inexpensive.
It is a second objective of the present invention to provide a method for manufacturing a PHEMT power device in which the structure and processing conditions of an epitaxial substrate are optimized to provide the PHEMT power device capable of operating with a single voltage supply and having excellent linearity and a high breakdown voltage.
To achieve the first objective of the present invention, there is provided a PHEMT power device comprising: an epitaxial substrate including a GaAs buffer layer, an AlGaAs/GaAs superlattice layer, an updoped AlGaAs layer, a first doped silicon layer, a first spacer, an InGaAs electron transit layer, a second spacer, a second doped silicon layer having a different doping concentration from the first doped silicon layer, a lightly doped AlGaAs layer, and an undoped GaAs cap layer stacked sequentially on a semi-insulating GaAs substrate; a source electrode and a drain electrode formed on and in ohmic contact with the undoped GaAs cap layer; and a gate electrode formed on the lightly doped AlGaAs layer to extend through the undoped GaAs cap layer.
It is preferable that each of the source electrode and the drain electrodes is formed of a AuGe/Ni/Au metal thin films.
It is preferable that the first doped silicon layer has a higher doping concentration than the second doped silicon layer. It is preferable that the first doped silicon layer has a doping concentration of 1.5×10
12
-2.5×10
12
cm
−2
, and the second doped silicon layer has a doping concentration of 0.7×10
12
-1.5×10
12
cm
−2
. More preferably, the doping concentration of the first doped silicon layer is twice that of the second doped silicon layer.
To improve lattice structure quality, it is preferable that the undoped AlGaAs layer contains aluminum of 0.3 or less by mole ratio.
It is preferable that the lightly doped AlGaAs layer has a doping concentration of 1.0×10
16
-1.0×10
17
cm
−3
. It is preferable that the undoped GaAs cap layer has a thickness of 1-100 nm. It is preferable that the InGaAs electron transit layer contains indium of 0.25 or less by mole ratio. It is preferable that the InGaAs electron transit layer has a thickness of 1-15 nm.
Preferably, the PHEMT power device further comprises a protective insulating layer formed on a portion of the undoped GaAs cap layer exposed by the source electrode, the drain electrode, and the gate electrode.
To achieve the second objective of the present invention, there is provided a method for manufacturing a PHEMT power device, comprising the steps of: sequentially stacking a GaAs buffer layer, an AlGaAs/GaAs superlattice layer, an updoped AlGaAs layer, a first doped silicon layer, a first spacer, an InGaAs electron transit layer, a second spacer, a second doped silicon layer having a different doping concentration from the first doped silicon layer, a lightly doped AlGaAs layer, and an undoped GaAs cap layer on a semi-insulating GaAs substrate; forming a source electrode and a drain electrode on and in ohmic contact with the undoped GaAs cap layer by forming a metal thin film on the undoped GaAs cap layer; forming a protective insulating layer on an exposed surface of the undoped GaAs cap layer; and defining a gate region exposing a portion of the undoped GaAs cap layer by removing a portion of the protective insulting layer; exposing a portion of the lightly doped AlGaAs layer by recess etching the exposed portion of the undoped GaAs cap layer in the gate region; and forming a gate electrode on the exposed portion of the lightly doped AlGaAs layer.
It is preferable that the PHEMT power device manufacturing method further comprises forming a photoresist pattern having an opening of a larger width than the gate electrode to be formed in the defined gate region to recess etch the undoped GaAs cap layer.
It is preferable that the PHEMT power device manufacturing method further comprises heat treating the source electrode and the drain electrode by rapid thermal annealing after the step of forming the source electrode and the drain electrode.
In the PHEMT power device according to the present invention, the structure of the epitaxial substrate, i.e., the doping concentration and thickness of a donor layer, is optimized to maintain the transconductance constant with respect to gate voltages. The PHEMT power device according to the present invention is capable of operating with a single voltage supply, without need to apply a negative bias voltage, and has a high breakdown voltage, excellent linearity and power-added efficiency.


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patent: 2000269480 (

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