Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-05-03
2003-05-27
Shankar, Vijay (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S094000
Reexamination Certificate
active
06570549
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display using a TFT, and more particularly to a method of driving a liquid crystal.
FIG. 1
shows the structure of a conventional liquid crystal display (LCD) using a Thin Film Transistor (TFT). A thin film transistor element
1
, a source line
2
, a gate line
3
, a drain
4
and a pixel electrode
5
are formed on a glass substrate
6
to form a TFT substrate. A counter electrode
7
is formed on a glass substrate
8
to form an opposite substrate. The TFT substrate and the opposed substrate are provided in parallel with each other and a liquid crystal is interposed between the TFT substrate and the opposite substrate.
FIG. 2
shows an equivalent circuit for one pixel of FIG.
1
.
In
FIG. 2
, the reference numeral
9
denotes a source signal to be applied to the source line
2
and the reference numeral
10
denotes a gate signal to be applied to the gate line
3
. A symbol C
gd
represents a coupling capacitance between a gate and a drain, a symbol C
ds
represents a coupling capacitance between a source and a drain, and a symbol C
1c
represents a coupling capacitance of a liquid crystal interposed between a pixel electrode and a counter electrode. C
s
represents a retaining capacitance formed to enhance a retaining characteristic of a pixel and to improve a picture quality.
FIG. 3
shows a waveform of a signal to be applied to a pixel.
The source signal
9
is an alternating voltage having an amplitude V
sa
in which a central electric potential V
so
is a median. The amplitude V
sa
corresponds to a gradation to be displayed on a pixel. The gate signal
10
is set to the High level (hereinafter referred to as “Hi” level) only for one scanning period and to the Low level (hereinafter referred to as “Lo” level) for other periods. The reference numeral
11
denotes a waveform representing an electric potential of the pixel electrode
5
.
First of all, when the gate signal
10
becomes the Hi level in an odd frame
101
shown in
FIG. 3
, the electric potential
11
of the pixel electrode
5
becomes have the level of the source signal
9
. When the gate signal
10
becomes the Lo level, a voltage drop of &Dgr;V
gd
is generated on the electric potential
11
of the pixel electrode
5
under the influence of the coupling capacitance C
gd
between the gate and the drain. The voltage drop &Dgr;V
gd
is referred to as a feed-through voltage and is expressed by the following equation (1):
&Dgr;
V
gd
=&Dgr;V
g
×C
gd
/(
C
1c
+C
gd
+C
ds
+C
s
) Equation (1)
wherein &Dgr;V
g
represents an amount of voltage change of the gate signal
10
.
Then, the electric potential
11
of the pixel electrode
5
is held mainly by the retaining capacitance C
s
for one frame.
When the gate signal
10
becomes the Hi level again in a subsequent even frame
102
, the electric potential
11
of the pixel
5
becomes the level of the source signal
9
. When the gate signal
10
becomes the Lo level, a voltage drop &Dgr;V
gd
is also generated. As described above, the voltage drop &Dgr;V
gd
is expressed by the equation (1).
On the other hand, a one-dotted chain line
12
shown in
FIG. 3
indicates an electric potential of the counter electrode
7
, which is generally referred to as a common signal. An electric potential of the common signal
12
can be usually regulated by a variable resistor or the like which is additionally provided, and the absolute values of a voltage V
o
to be applied to the liquid crystal in the odd frame
101
and a voltage V
e
to be applied to the liquid crystal in the even frame
102
are set to be equal to each other. At that time, the electric potential of the common signal is referred to as an optimum V
com
.
In the LCD using a TFT method, generally, the writing of positive and negative polarities is carried out at a frequency of approximately 60 Hz. Accordingly, in the case in which the absolute values of the voltage V
o
to be applied to the liquid crystal in the odd frame and the voltage V
e
to be applied to the liquid crystal in the even frame are not equal to each other, so-called a flicker having a frequency of approximately 30 Hz is observed.
Furthermore, in the case in which the absolute values of the voltages V
o
and V
e
are not set to be equal to each other, the magnitudes of the alternating voltages to be applied to the liquid crystal are not equal to each other with positive and negative polarities. As a result, a DC voltage is applied. At that time, as shown in
FIG. 4
, an electric charge is moved in a direction of each electrode through the DC voltage applied to a liquid crystal layer.
When the same image is displayed for a long time in the LCD and another image is then displayed, a “sticking” is caused, in which a residual DC is generated and a last image remains as an afterimage.
In order to prevent “sticking” from causing, accordingly, the electric potential of the common signal
12
is regulated to coincide with the center of the electric potential
11
of the pixel electrode
5
.
However, the coupling capacitance C
1c
caused by the liquid crystal in the components of the equation (1) has a dependency on an applied voltage.
FIG. 5
shows the relationship between a voltage applied to the liquid crystal and the coupling capacitance C
1c
caused by the liquid crystal. An axis of abscissa indicates an amplitude V
sa
of the source signal
9
as the voltage to be applied to the liquid crystal and an axis of ordinate indicates the coupling capacitance C
1c
caused by the liquid crystal. The value of the coupling capacitance C
1c
caused by the liquid crystal is varied depending on the voltage to be applied to the liquid crystal, that is, a gradation of an image to be displayed.
Accordingly, the feed-through voltage &Dgr;V
gd
expressed in the equation (1) is not always constant but is changed as shown in
FIG. 6
depending on the amplitude V
sa
of the source signal
9
, that is, the gradation of the image to be displayed.
As is apparent from
FIG. 6
, in the case in which the amplitude V
sa
of the source signal
9
is great, that is, a gradation close to a black color is to be displayed, the feed-through voltage &Dgr;V
gd
is low. In the case in which the amplitude V
sa
of the source signal
9
is small, that is, a gradation close to a white color is to be displayed, the feed-through voltage &Dgr;V
gd
is high.
In order to make the absolute values of the voltage V
o
to be applied to the liquid crystal in the odd frame and the voltage V
e
to be applied to the liquid crystal in the even frame to be equal to each other, it is necessary to set the electric potential of the common signal
12
to be low during a white display with a high feed-through voltage &Dgr;V
gd
and to set the electric potential of the common signal
12
to be high during a black display with a low feed-through voltage &Dgr;V
gd
. This relationship is shown in FIG.
7
.
In
FIG. 7
, an axis of abscissa indicates the amplitude V
sa
of the source signal
9
, that is, a gradation of an image to be displayed, and an axis of ordinate indicates an optimum electric potential V
com
of the common signal. As is apparent from
FIG. 7
, the optimum electric potential V
com
of the common signal is varied every gradation. However, the counter electrode
7
to which the common signal
12
is to be applied is common over the whole region of a screen. Accordingly, when different gradations are displayed in the screen, there is always a pixel which is not given an optimum electric potential V
com
of the common signal and a DC voltage is applied to cause “sticking”.
In order to compensate for the feed-through voltage &Dgr;V
gd
to be varied depending on the gradation, therefore, an offset compensation driving is used.
With reference to
FIGS. 8 and 9
, the principle of the offset compensation driving will be described. As mentioned above, if the amplitude V
sa
of the source signal
9
is small, the feed-through voltage &Dgr;V
gd
is high. Accordingly, as shown in
FIG. 8
, t
Nakanishi Kunifumi
Teragaki Tomoya
Advanced Display Inc.
Patel Nitin
Shankar Vijay
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