Multi row leadless leadframe package

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices

Reexamination Certificate

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Details

C438S123000

Reexamination Certificate

active

06617197

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates generally to semiconductor packaging and more particularly to improved leadless leadframe based packaging.
A leadless leadframe package (LLP) is a relatively new integrated circuit package design that contemplates the use of a metal (typically copper) leadframe type substrate structure in the formation of the conductive elements of a package. As illustrated in
FIG. 1
, in typical leadless leadframe packages, a copper leadframe strip or panel
101
is patterned (typically by stamping or etching) to define a plurality of arrays
103
of chip substrate features
105
. Each chip substrate feature
105
includes a die attach pad
107
and a plurality of contacts
109
disposed about their associated die attach pad
107
. Very fine tie bars
111
are used to support the die attach pads
107
and contacts
109
.
During assembly, dice are attached to the respective die attach pads and conventional wire bonding is used to electrically couple bond pads on each die to their associated contacts
109
on the leadframe strip
101
. After the wire bonding, a plastic cap is molded over the top surface of the each array
103
of wire bonded dice. The wire bonded units are then singulated and tested using conventional sawing and testing techniques. During singulation, the tie bars
111
are cut and therefore the only materials holding the contacts
109
in place is the molding material. The resulting packaged chip can then be surface mounted on a printed circuit board or other substrate using conventional techniques.
Although leadless leadframe packaging has proven to be a cost-effective packaging arrangement, there are continuing efforts to further reduce the costs associated with packaging. Most existing leadless leadframe designs have only one or two rows of contacts
109
. Accordingly additional and improved leadless leadframe designs that are particularly well suited for use in relatively high pin count devices would be desirable.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects and in accordance with the purpose of the present invention, a packaging arrangement is described that utilizes a conductive panel (such as a leadless leadframe) as its base. The conductive panel has a matrix of device areas that each include a plurality of rows of contacts that are located outside of a die area. Tie bars provide support for the various contacts. Some of the tie bars are arranged to extend between adjacent contacts in the same row and some of the tie bars are arranged to extend diagonally between associated contacts in adjacent rows that are not adjacent one another. With the described arrangement, during packaging, the tie bars can be severed by cutting along lines (e.g. saw streets) that run adjacent the rows after a molding operation.
In some preferred embodiments, the contacts in each device area are arranged at least three adjacent rows deep. The tie bars may have a thickness that is less than the thickness of the contacts, as for example about half the thickness of the contacts to make cutting easier. Methods of packaging integrated circuit devices using such conductive panels are also described.


REFERENCES:
patent: 4713575 (1987-12-01), Knapp et al.
patent: 5314606 (1994-05-01), Irie et al.
patent: 5723899 (1998-03-01), Shin
patent: 6031292 (2000-02-01), Murakami et al.
patent: 6215179 (2001-04-01), Ohgiyama

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